[Public]
> -----Original Message-----
> From: Lazar, Lijo <Lijo.Lazar@xxxxxxx>
> Sent: Wednesday, April 20, 2022 11:39 AM
> To: Liang, Prike <Prike.Liang@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Deucher, Alexander <Alexander.Deucher@xxxxxxx>; Huang, Ray
> <Ray.Huang@xxxxxxx>
> Subject: Re: [PATCH] drm/amdgpu: keep mmhub clock gating being enabled
> during s2idle suspend
>
>
>
> On 4/20/2022 7:32 AM, Prike Liang wrote:
> > Without MMHUB clock gating being enabled then MMHUB will not
> > disconnect from DF and will result in DF C-state entry can't be
> > accessed during S2idle suspend, and eventually s0ix entry will be blocked.
> >
> > Signed-off-by: Prike Liang <Prike.Liang@xxxxxxx>
> > ---
> > drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c | 9 +++++++++
> > 1 file changed, 9 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c
> > b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c
> > index 1957fb098c4d..cb3dca4834b4 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c
> > @@ -568,6 +568,15 @@ static int mmhub_v2_3_set_clockgating(struct
> amdgpu_device *adev,
> > {
> > if (amdgpu_sriov_vf(adev))
> > return 0;
> > + /*
> > + * The issue mmhub can't disconnect from DF with clock gating being
> disabled
> > + * seems only observed at DF 3.0.3, with the same suspend sequence
> not seen
> > + * any issue on the DF 3.0.2 series platform.
> > + */
> > + if (adev->in_s0ix) {
> > + dev_dbg(adev->dev, "keep mmhub clock gating being
> enabled for s0ix\n");
> > + return 0;
> > + }
> >
>
> A better fix would be to explicitly enable mmhub clockgating during s0ix
> suspend of gmc for this IP version.
>
> Thanks,
> Lijo
>
Yeah, it looks like more safe way to sort out the mmhub clock gating set for not influence old product.
However, still not sure whether really need sort out the case which can disabled mmhub clock gating for s0ix,
and it sounds like the clock gating enabled is a common requirement for each DF client can disconnect from DF.
> > mmhub_v2_3_update_medium_grain_clock_gating(adev,
> > state == AMD_CG_STATE_GATE);
> >
