[AMD Official Use Only]
Thanks for the confirming. I probably know the root cause.
Let me prepare an official patch for you.
BR
Evan
> -----Original Message-----
> From: Arthur Marsh <arthur.marsh@xxxxxxxxxxxxxxxx>
> Sent: Friday, April 1, 2022 8:19 PM
> To: Quan, Evan <Evan.Quan@xxxxxxx>
> Cc: Deucher, Alexander <Alexander.Deucher@xxxxxxx>; Koenig, Christian
> <Christian.Koenig@xxxxxxx>; Feng, Kenneth <Kenneth.Feng@xxxxxxx>;
> Lazar, Lijo <Lijo.Lazar@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx;
> arthur.marsh@xxxxxxxxxxxxxxxx
> Subject: [PATCH V4 17/17] drm/amd/pm: unified lock protections in
> amdgpu_dpm.c
>
> Hi, short answer is that with both patches applied, I am successfully running
> the amdgpu kernel module on radeonsi (plasma desktop on X.org).
>
> I confirmed that CONFIG_LOCKDEP_SUPPORT=y is enabled in the kernel.
>
> With the first patch applied and remotely connecting to the machine and
> loading amdgpu via:
>
> modprobe amdgpu si_support=1 gpu_recovery=1
>
> the last lines of dmesg were:
>
> [ 264.095969] [drm] Found UVD firmware Version: 64.0 Family ID: 13
> [ 264.097779] [drm] PCIE gen 2 link speeds already enabled
> [ 264.648137] [drm] UVD initialized successfully.
> [ 264.648696] amdgpu 0000:01:00.0: amdgpu: SE 1, SH per SE 2, CU per SH 5,
> active_cu_number 8
> [ 264.984814] [drm] Initialized amdgpu 3.46.0 20150101 for 0000:01:00.0 on
> minor 0
> [ 265.040280] fbcon: amdgpudrmfb (fb0) is primary device
>
> After applying the second patch and building and restarting with the new
> kernel, I could load amdgpu successfuly and start
> the plasma desktop under X.org, with the last amdgpu load lines being:
>
> [ 227.736281] fbcon: amdgpudrmfb (fb0) is primary device
> [ 227.760719] Console: switching to colour frame buffer device 240x67
> [ 227.765024] amdgpu 0000:01:00.0: [drm] fb0: amdgpudrmfb frame buffer
> device
>
> I tried building a kernel with just the second patch and that experienced
> a lockup after apparently loading amdgpu alright.
>
> First and second patches combined:
>
> diff --git a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
> b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
> index 89fbee568be4..e9ebbc9f4cd2 100644
> --- a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
> +++ b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
> @@ -80,8 +80,6 @@ int amdgpu_dpm_set_powergating_by_smu(struct
> amdgpu_device *adev, uint32_t block
> return 0;
> }
>
> - mutex_lock(&adev->pm.mutex);
> -
> switch (block_type) {
> case AMD_IP_BLOCK_TYPE_UVD:
> case AMD_IP_BLOCK_TYPE_VCE:
> @@ -102,8 +100,6 @@ int amdgpu_dpm_set_powergating_by_smu(struct
> amdgpu_device *adev, uint32_t block
> if (!ret)
> atomic_set(&adev->pm.pwr_state[block_type], pwr_state);
>
> - mutex_unlock(&adev->pm.mutex);
> -
> return ret;
> }
>
> @@ -423,9 +419,7 @@ void amdgpu_dpm_compute_clocks(struct
> amdgpu_device *adev)
> if (!pp_funcs->pm_compute_clocks)
> return;
>
> - mutex_lock(&adev->pm.mutex);
> pp_funcs->pm_compute_clocks(adev->powerplay.pp_handle);
> - mutex_unlock(&adev->pm.mutex);
> }
>
> void amdgpu_dpm_enable_uvd(struct amdgpu_device *adev, bool enable)
>
> Thanks for the assistance!
>
> Arthur.
