[AMD Official Use Only] Hi Paul, I just sent out V3, which re-ordered the if/else condition as you suggested. By the way, both V2 and V3 can be applied successfully on my local machine. In case it still doesn't apply on your side, can I ask which branch are you using? Thanks, Boyuan -----Original Message----- From: Paul Menzel <pmenzel@xxxxxxxxxxxxx> Sent: March 25, 2022 2:10 AM To: Zhang, Boyuan <Boyuan.Zhang@xxxxxxx> Cc: Deucher, Alexander <Alexander.Deucher@xxxxxxx>; Zhang, Yifan <Yifan1.Zhang@xxxxxxx>; Huang, Ray <Ray.Huang@xxxxxxx>; Liu, Leo <Leo.Liu@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx Subject: Re: [PATCH V2] drm/amdgpu/vcn3: send smu interface type Dear Boyuan, Am 25.03.22 um 06:53 schrieb Paul Menzel: > Dear Boyuan, > > > Thank for the improved patch. > > > Am 24.03.22 um 18:25 schrieb Zhang, Boyuan: >> [AMD Official Use Only] > > No idea if this would confuse `git am`. > >> From: Boyuan Zhang >> <boyuan.zhang@xxxxxxx<mailto:boyuan.zhang@xxxxxxx>> > > Your mailer(?) mangled the patch. Did you edit it in your MUA’s > compose window? > >> For VCN FW to detect ASIC type, in order to use different mailbox >> registers. >> >> V2: simplify codes and fix format issue. >> >> Signed-off-by: Boyuan Zhang >> <boyuan.zhang@xxxxxxx<mailto:boyuan.zhang@xxxxxxx>> >> Acked-by Huang Rui <ray.huang@xxxxxxx> >> --- >> drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 7 +++++++ >> drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 5 +++++ >> 2 files changed, 12 insertions(+) >> >> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h >> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h >> index e2fde88aaf5e..f06fb7f882e2 100644 >> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h >> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h >> @@ -159,6 +159,7 @@ >> #define AMDGPU_VCN_MULTI_QUEUE_FLAG (1 << 8) #define >> AMDGPU_VCN_SW_RING_FLAG (1 << 9) #define >> AMDGPU_VCN_FW_LOGGING_FLAG (1 << 10) >> +#define AMDGPU_VCN_SMU_VERSION_INFO_FLAG (1 << 11) >> #define AMDGPU_VCN_IB_FLAG_DECODE_BUFFER 0x00000001 #define >> AMDGPU_VCN_CMD_FLAG_MSG_BUFFER 0x00000001 @@ >> -279,6 +280,11 @@ struct amdgpu_fw_shared_fw_logging { >> uint32_t size; >> }; >> +struct amdgpu_fw_shared_smu_interface_info { >> + uint8_t smu_interface_type; >> + uint8_t padding[3]; >> +}; >> + >> struct amdgpu_fw_shared { >> uint32_t present_flag_0; >> uint8_t pad[44]; >> @@ -287,6 +293,7 @@ struct amdgpu_fw_shared { >> struct amdgpu_fw_shared_multi_queue multi_queue; >> struct amdgpu_fw_shared_sw_ring sw_ring; >> struct amdgpu_fw_shared_fw_logging fw_log; >> + struct amdgpu_fw_shared_smu_interface_info >> smu_interface_info; >> }; >> struct amdgpu_vcn_fwlog { >> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c >> b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c >> index b16c56aa2d22..9925b2bc63b9 100644 >> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c >> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c >> @@ -219,6 +219,11 @@ static int vcn_v3_0_sw_init(void *handle) >> >> cpu_to_le32(AMDGPU_VCN_MULTI_QUEUE_FLAG) | >> >> cpu_to_le32(AMDGPU_VCN_FW_SHARED_FLAG_0_RB); >> fw_shared->sw_ring.is_enabled = >> cpu_to_le32(DEC_SW_RING_ENABLED); >> + fw_shared->present_flag_0 |= >> AMDGPU_VCN_SMU_VERSION_INFO_FLAG; >> + if (adev->ip_versions[UVD_HWIP][0] == >> IP_VERSION(3, 1, 2)) >> + >> fw_shared->smu_interface_info.smu_interface_type = 2; >> + else if (adev->ip_versions[UVD_HWIP][0] >> == IP_VERSION(3, 1, 1)) As commented on patch v1, please also put (3, 1, 1) first. >> + >> fw_shared->smu_interface_info.smu_interface_type = 1; >> if (amdgpu_vcnfw_log) >> >> amdgpu_vcn_fwlog_init(&adev->vcn.inst[i]); >> -- >> 2.25.1 > > The whole patch cannot be applied. Did `scripts/checkpatch.pl` not > detect this? Please fix and resend. Kind regards, Paul
