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[AMD Official Use Only]
Thank you very much for your suggestion, but I have already submitted.
Regards,
Rico
From: Chen, Guchun <Guchun.Chen@xxxxxxx>
Sent: Monday, March 28, 2022 10:17 To: Chen, Guchun <Guchun.Chen@xxxxxxx>; Yin, Tianci (Rico) <Tianci.Yin@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx <amd-gfx@xxxxxxxxxxxxxxxxxxxxx> Cc: Wang, Yu (Charlie) <Yu.Wang4@xxxxxxx>; Zhu, James <James.Zhu@xxxxxxx>; Yin, Tianci (Rico) <Tianci.Yin@xxxxxxx> Subject: RE: [PATCH] drm/amd/vcn: fix an error msg on vcn 3.0 Hi Tianci,
I think we shall improve the subject a bit like "drm/amdgpu: fix incorrect instance id passing when stopping dpg mode". How do you think? Regards, Guchun -----Original Message----- From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Chen, Guchun Sent: Monday, March 28, 2022 9:26 AM To: Yin, Tianci (Rico) <Tianci.Yin@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx Cc: Wang, Yu (Charlie) <Yu.Wang4@xxxxxxx>; Zhu, James <James.Zhu@xxxxxxx>; Yin, Tianci (Rico) <Tianci.Yin@xxxxxxx> Subject: RE: [PATCH] drm/amd/vcn: fix an error msg on vcn 3.0 Reviewed-by: Guchun Chen <guchun.chen@xxxxxxx> Regards, Guchun -----Original Message----- From: Tianci Yin <tianci.yin@xxxxxxx> Sent: Sunday, March 27, 2022 7:19 PM To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx Cc: Chen, Guchun <Guchun.Chen@xxxxxxx>; Zhu, James <James.Zhu@xxxxxxx>; Wang, Yu (Charlie) <Yu.Wang4@xxxxxxx>; Yin, Tianci (Rico) <Tianci.Yin@xxxxxxx> Subject: [PATCH] drm/amd/vcn: fix an error msg on vcn 3.0 From: tiancyin <tianci.yin@xxxxxxx> Some video card has more than one vcn instance, passing 0 to vcn_v3_0_pause_dpg_mode is incorrect. Error msg: Register(1) [mmUVD_POWER_STATUS] failed to reach value 0x00000001 != 0x00000002 Signed-off-by: tiancyin <tianci.yin@xxxxxxx> --- drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c index e1cca0a10653..cb5f0a12333f 100644 --- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c @@ -1488,7 +1488,7 @@ static int vcn_v3_0_stop_dpg_mode(struct amdgpu_device *adev, int inst_idx) struct dpg_pause_state state = {.fw_based = VCN_DPG_STATE__UNPAUSE}; uint32_t tmp; - vcn_v3_0_pause_dpg_mode(adev, 0, &state); + vcn_v3_0_pause_dpg_mode(adev, inst_idx, &state); /* Wait for power status to be 1 */ SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, 1, -- 2.25.1 |
