[AMD Official Use Only]
Hi all,
This week this patchset was tested on the following systems:
HP Envy 360, with Ryzen 5 4500U, with the following display types: eDP 1080p 60hz, 4k 60hz (via USB-C to DP/HDMI), 1440p 144hz (via USB-C to DP/HDMI), 1680*1050 60hz (via USB-C to DP and then DP to DVI/VGA)
Lenovo Thinkpad T14s Gen2 with AMD Ryzen 5 5650U, with the following display types: eDP 1080p 60hz, 4k 60hz (via USB-C to DP/HDMI), 1440p 144hz (via USB-C to DP/HDMI), 1680*1050 60hz (via USB-C to DP and then DP to DVI/VGA)
Sapphire Pulse RX5700XT with the following display types:
4k 60hz (via DP/HDMI), 1440p 144hz (via DP/HDMI), 1680*1050 60hz (via DP to DVI/VGA)
Reference AMD RX6800 with the following display types:
4k 60hz (via DP/HDMI and USB-C to DP/HDMI), 1440p 144hz (via USB-C to DP/HDMI and USB-C to DP/HDMI), 1680*1050 60hz (via DP to DVI/VGA)
Included testing using a Startech DP 1.4 MST hub at 2x 4k 60hz, and 3x 1080p 60hz on all systems. Also tested DSC via USB-C to DP DSC Hub with 3x 4k 60hz on Ryzen 9 5900h and Ryzen 5 4500u.
Tested on Ubuntu 20.04.4 with Kernel Version 5.16 and ChromeOS
Tested-by: Daniel Wheeler <daniel.wheeler@xxxxxxx>
Thank you,
Dan Wheeler
Technologist | AMD
SW Display
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1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
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-----Original Message-----
From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Alan Liu
Sent: March 7, 2022 3:59 PM
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Wang, Chao-kai (Stylon) <Stylon.Wang@xxxxxxx>; Liu, HaoPing (Alan) <HaoPing.Liu@xxxxxxx>; Cyr, Aric <Aric.Cyr@xxxxxxx>; Li, Sun peng (Leo) <Sunpeng.Li@xxxxxxx>; Wentland, Harry <Harry.Wentland@xxxxxxx>; Zhuo, Qingqing (Lillian) <Qingqing.Zhuo@xxxxxxx>; Siqueira, Rodrigo <Rodrigo.Siqueira@xxxxxxx>; Li, Roman <Roman.Li@xxxxxxx>; Chiu, Solomon <Solomon.Chiu@xxxxxxx>; Pillai, Aurabindo <Aurabindo.Pillai@xxxxxxx>; Lin, Wayne <Wayne.Lin@xxxxxxx>; Lakha, Bhawanpreet <Bhawanpreet.Lakha@xxxxxxx>; Gutierrez, Agustin <Agustin.Gutierrez@xxxxxxx>; Kotarac, Pavle <Pavle.Kotarac@xxxxxxx>
Subject: [PATCH 00/21] DC Patches Mar 7, 2022
This DC patchset brings improvements in multiple areas. In summary, we have:
* Remove FPU-related code from dcn20/21/303 to dml folder;
* Fixes related to clock_source_create;
* Several enhancements in DC/DMUB;
This version brings along following fixes:
- move FPU operations from dcn21 to dml/dcn20 folder
- move FPU-related code from dcn20 to dml folder
- Fix compile error from TO_CLK_MGR_INTERNAL
- Fix double free during GPU reset on DC streams
- Add NULL check
- [FW Promotion] Release 0.0.107.0
- enable dcn315/316 s0i2 support
- handle DP2.0 RX with UHBR20 but not UHBR13.5 support
- disable HPD SW timer for passive dongle type 1 only
- add gamut coefficient set A and B
- merge two duplicated clock_source_create
- Add link dp trace support
- move FPU associated DCN303 code to DML folder
- Release AUX engine after failed acquire
- Add minimal pipe split transition state
- Clean up fixed VS PHY test w/a function
- fix the clock source contruct for dcn315
- cleaning up smu_if to add future flexibility
- fix deep color ratio
- add debug option to bypass ssinfo from bios for dcn315
Acked-by: Alan Liu <HaoPing.Liu@xxxxxxx>
Signed-off-by: Aric Cyr <aric.cyr@xxxxxxx>
Anthony Koo (1):
drm/amd/display: [FW Promotion] Release 0.0.107.0
Aric Cyr (1):
drm/amd/display: 3.2.176
Charlene Liu (3):
drm/amd/display: fix the clock source contruct for dcn315
drm/amd/display: merge two duplicated clock_source_create
drm/amd/display: enable dcn315/316 s0i2 support
Chris Park (1):
drm/amd/display: Add NULL check
Dhillon, Jasdeep (1):
drm/amd/display: move FPU associated DCN303 code to DML folder
Dillon Varone (1):
drm/amd/display: Add minimal pipe split transition state
George Shen (1):
drm/amd/display: Clean up fixed VS PHY test w/a function
Hansen Dsouza (1):
drm/amd/display: fix deep color ratio
Jingwen Zhu (1):
drm/amd/display: add gamut coefficient set A and B
Leo (Hanghong) Ma (1):
drm/amd/display: Add link dp trace support
Leo Li (1):
drm/amd/display: Fix compile error from TO_CLK_MGR_INTERNAL
Leung, Martin (1):
drm/amd/display: cleaning up smu_if to add future flexibility
Melissa Wen (2):
drm/amd/display: move FPU operations from dcn21 to dml/dcn20 folder
drm/amd/display: move FPU code from dcn10 to dml/dcn10 folder
Melissa·Wen· (1):
drm/amd/display: move FPU-related code from dcn20 to dml folder
Nicholas Kazlauskas (1):
drm/amd/display: Fix double free during GPU reset on DC streams
Sung Joon Kim (1):
drm/amd/display: disable HPD SW timer for passive dongle type 1 only
Wenjing Liu (1):
drm/amd/display: handle DP2.0 RX with UHBR20 but not UHBR13.5 support
Wyatt Wood (1):
drm/amd/display: Release AUX engine after failed acquire
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 9 +-
.../display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c | 13 +-
.../dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.c | 9 +-
.../dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.h | 67 +-
.../dc/clk_mgr/dcn30/dcn30_smu11_driver_if.h | 74 +
.../dc/clk_mgr/dcn315/dcn315_clk_mgr.c | 2 +-
.../dc/clk_mgr/dcn316/dcn316_clk_mgr.c | 8 +-
.../display/dc/clk_mgr/dcn316/dcn316_smu.c | 26 +
.../display/dc/clk_mgr/dcn316/dcn316_smu.h | 2 +
drivers/gpu/drm/amd/display/dc/core/dc.c | 9 +-
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 6 +
.../gpu/drm/amd/display/dc/core/dc_link_ddc.c | 2 +
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 128 +-
.../drm/amd/display/dc/core/dc_link_enc_cfg.c | 7 +
.../gpu/drm/amd/display/dc/core/dc_resource.c | 3 +
drivers/gpu/drm/amd/display/dc/dc.h | 3 +-
drivers/gpu/drm/amd/display/dc/dc_link.h | 36 +
drivers/gpu/drm/amd/display/dc/dce/dce_aux.c | 2 +-
.../drm/amd/display/dc/dce/dce_clock_source.c | 117 +
.../drm/amd/display/dc/dce/dce_clock_source.h | 9 +
.../drm/amd/display/dc/dcn10/dcn10_resource.c | 62 -
.../drm/amd/display/dc/dcn10/dcn10_resource.h | 4 +
drivers/gpu/drm/amd/display/dc/dcn20/Makefile | 25 -
.../drm/amd/display/dc/dcn20/dcn20_resource.c | 1369 +-----------
.../drm/amd/display/dc/dcn20/dcn20_resource.h | 31 +-
drivers/gpu/drm/amd/display/dc/dcn21/Makefile | 25 -
.../drm/amd/display/dc/dcn21/dcn21_resource.c | 564 +----
.../drm/amd/display/dc/dcn21/dcn21_resource.h | 11 +
.../drm/amd/display/dc/dcn30/dcn30_dpp_cm.c | 2 +-
.../drm/amd/display/dc/dcn30/dcn30_resource.c | 7 +
.../gpu/drm/amd/display/dc/dcn303/Makefile | 26 -
.../amd/display/dc/dcn303/dcn303_resource.c | 327 +--
.../amd/display/dc/dcn303/dcn303_resource.h | 3 +
.../drm/amd/display/dc/dcn31/dcn31_resource.c | 6 +-
.../amd/display/dc/dcn315/dcn315_resource.c | 37 +-
.../amd/display/dc/dcn316/dcn316_resource.c | 37 +-
drivers/gpu/drm/amd/display/dc/dml/Makefile | 4 +
.../drm/amd/display/dc/dml/dcn10/dcn10_fpu.c | 123 ++
.../drm/amd/display/dc/dml/dcn10/dcn10_fpu.h | 30 +
.../drm/amd/display/dc/dml/dcn20/dcn20_fpu.c | 1922 +++++++++++++++++
.../drm/amd/display/dc/dml/dcn20/dcn20_fpu.h | 51 +
.../amd/display/dc/dml/dcn303/dcn303_fpu.c | 362 ++++
.../amd/display/dc/dml/dcn303/dcn303_fpu.h | 32 +
.../gpu/drm/amd/display/dc/inc/link_enc_cfg.h | 5 +
drivers/gpu/drm/amd/display/dc/link/Makefile | 2 +-
.../drm/amd/display/dc/link/link_dp_trace.c | 146 ++
.../drm/amd/display/dc/link/link_dp_trace.h | 57 +
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 4 +-
.../amd/display/include/ddc_service_types.h | 1 +
.../display/include/grph_object_ctrl_defs.h | 22 -
50 files changed, 3213 insertions(+), 2616 deletions(-) create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_smu11_driver_if.h
create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dcn10/dcn10_fpu.c
create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dcn10/dcn10_fpu.h
create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dcn303/dcn303_fpu.c
create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dcn303/dcn303_fpu.h
create mode 100644 drivers/gpu/drm/amd/display/dc/link/link_dp_trace.c
create mode 100644 drivers/gpu/drm/amd/display/dc/link/link_dp_trace.h
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2.25.1
