Update DCN 3.1 for 3.1.6. This is a minor update to DCN 3.1 display support in amdgpu. The first two patches are register headers so I did not send them out due to size. Hansen Dsouza (1): drm/amd/display: Add DCN316 resource and SMU clock manager Leo Li (3): drm/amd/include: Add register headers for DCN 3.1.6 drm/amd/include: Add MP 13.0.8 register headers drm/amd/display: Add DMUB support for DCN316 Prike Liang (2): drm/amd/display: configure dc hw resource for DCN 3.1.6 drm/amdgpu/discovery: Add sw DM function for 3.1.6 DCE drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 1 + .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 14 +- .../amd/display/amdgpu_dm/amdgpu_dm_hdcp.c | 3 +- drivers/gpu/drm/amd/display/dc/Makefile | 1 + .../display/dc/bios/command_table_helper2.c | 1 + .../gpu/drm/amd/display/dc/clk_mgr/Makefile | 10 + .../gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | 16 + .../dc/clk_mgr/dcn316/dcn316_clk_mgr.c | 706 + .../dc/clk_mgr/dcn316/dcn316_clk_mgr.h | 49 + .../display/dc/clk_mgr/dcn316/dcn316_smu.c | 328 + .../display/dc/clk_mgr/dcn316/dcn316_smu.h | 128 + .../gpu/drm/amd/display/dc/core/dc_resource.c | 8 + .../gpu/drm/amd/display/dc/dcn316/Makefile | 56 + .../amd/display/dc/dcn316/dcn316_resource.c | 2306 + .../amd/display/dc/dcn316/dcn316_resource.h | 42 + drivers/gpu/drm/amd/display/dc/gpio/Makefile | 1 + .../gpu/drm/amd/display/dc/gpio/hw_factory.c | 1 + .../drm/amd/display/dc/gpio/hw_translate.c | 1 + drivers/gpu/drm/amd/display/dmub/dmub_srv.h | 1 + drivers/gpu/drm/amd/display/dmub/src/Makefile | 2 + .../drm/amd/display/dmub/src/dmub_dcn316.c | 62 + .../drm/amd/display/dmub/src/dmub_dcn316.h | 33 + .../gpu/drm/amd/display/dmub/src/dmub_srv.c | 4 + .../gpu/drm/amd/display/include/dal_asic_id.h | 6 +- .../gpu/drm/amd/display/include/dal_types.h | 1 + .../include/asic_reg/dcn/dcn_3_1_6_offset.h | 15682 ++ .../include/asic_reg/dcn/dcn_3_1_6_sh_mask.h | 62717 +++++++ .../include/asic_reg/dpcs/dpcs_4_2_3_offset.h | 11969 ++ .../asic_reg/dpcs/dpcs_4_2_3_sh_mask.h | 136141 +++++++++++++++ .../include/asic_reg/mp/mp_13_0_8_offset.h | 410 + .../include/asic_reg/mp/mp_13_0_8_sh_mask.h | 603 + 31 files changed, 231300 insertions(+), 3 deletions(-) create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.h create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_smu.c create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_smu.h create mode 100644 drivers/gpu/drm/amd/display/dc/dcn316/Makefile create mode 100644 drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.h create mode 100644 drivers/gpu/drm/amd/display/dmub/src/dmub_dcn316.c create mode 100644 drivers/gpu/drm/amd/display/dmub/src/dmub_dcn316.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_6_offset.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_6_sh_mask.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_4_2_3_offset.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_4_2_3_sh_mask.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/mp/mp_13_0_8_offset.h create mode 100644 drivers/gpu/drm/amd/include/asic_reg/mp/mp_13_0_8_sh_mask.h -- 2.34.1
