List of register populated for dump collection during the GPU reset. Signed-off-by: Somalapuram Amaranath <Amaranath.Somalapuram@xxxxxxx> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 4 + drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 89 +++++++++++++++++++++ 2 files changed, 93 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index b85b67a88a3d..2e8c2318276d 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -1097,6 +1097,10 @@ struct amdgpu_device { struct amdgpu_reset_control *reset_cntl; uint32_t ip_versions[HW_ID_MAX][HWIP_MAX_INSTANCE]; + + /* reset dump register */ + uint32_t *reset_dump_reg_list; + int n_regs; }; static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c index 164d6a9e9fbb..edcb032bc1f3 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c @@ -1609,6 +1609,93 @@ DEFINE_DEBUGFS_ATTRIBUTE(fops_ib_preempt, NULL, DEFINE_DEBUGFS_ATTRIBUTE(fops_sclk_set, NULL, amdgpu_debugfs_sclk_set, "%llu\n"); +static ssize_t amdgpu_reset_dump_register_list_read(struct file *f, + char __user *buf, size_t size, loff_t *pos) +{ + struct amdgpu_device *adev = (struct amdgpu_device *)file_inode(f)->i_private; + char reg_offset[11]; + int i, r, len = 0; + + if (adev->n_regs == 0) + return 0; + + for (i = 0; i < adev->n_regs; i++) { + memset(reg_offset, 0, 11); + sprintf(reg_offset + strlen(reg_offset), + "0x%x ", adev->reset_dump_reg_list[i]); + r = copy_to_user(buf + len, reg_offset, strlen(reg_offset)); + len += strlen(reg_offset); + } + + r = copy_to_user(buf + len, "\n", 1); + len++; + + if (*pos >= len) + return 0; + + *pos += len - r; + + return len; +} + +static ssize_t amdgpu_reset_dump_register_list_write(struct file *f, + const char __user *buf, size_t size, loff_t *pos) +{ + struct amdgpu_device *adev = (struct amdgpu_device *)file_inode(f)->i_private; + char *reg_offset, *reg, reg_temp[11]; + int ret, i = 0, len = 0; + + reg_offset = reg_temp; + memset(reg_offset, 0, 11); + ret = copy_from_user(reg_offset, buf, 11); + + if (ret) + return -EFAULT; + + if (adev->n_regs > 0) { + adev->n_regs = 0; + kfree(adev->reset_dump_reg_list); + adev->reset_dump_reg_list = NULL; + } + + while (((reg = strsep(®_offset, " ")) != NULL) && len < size) { + adev->reset_dump_reg_list = krealloc_array( + adev->reset_dump_reg_list, 1, + sizeof(uint32_t), GFP_KERNEL); + ret = kstrtouint(reg, 16, &adev->reset_dump_reg_list[i]); + + if (ret) { + kfree(adev->reset_dump_reg_list); + adev->reset_dump_reg_list = NULL; + return -EINVAL; + } + + len += strlen(reg) + 1; + reg_offset = reg_temp; + memset(reg_offset, 0, 11); + ret = copy_from_user(reg_offset, buf + len, 11); + + if (ret) { + kfree(adev->reset_dump_reg_list); + adev->reset_dump_reg_list = NULL; + return -EFAULT; + } + + i++; + } + + adev->n_regs = i; + + return size; +} + +static const struct file_operations amdgpu_reset_dump_register_list = { + .owner = THIS_MODULE, + .read = amdgpu_reset_dump_register_list_read, + .write = amdgpu_reset_dump_register_list_write, + .llseek = default_llseek +}; + int amdgpu_debugfs_init(struct amdgpu_device *adev) { struct dentry *root = adev_to_drm(adev)->primary->debugfs_root; @@ -1672,6 +1759,8 @@ int amdgpu_debugfs_init(struct amdgpu_device *adev) &amdgpu_debugfs_test_ib_fops); debugfs_create_file("amdgpu_vm_info", 0444, root, adev, &amdgpu_debugfs_vm_info_fops); + debugfs_create_file("amdgpu_reset_dump_register_list", 0644, root, adev, + &amdgpu_reset_dump_register_list); adev->debugfs_vbios_blob.data = adev->bios; adev->debugfs_vbios_blob.size = adev->bios_size; -- 2.25.1