[AMD Official Use Only]
With the typo fixed, the patch is:
Reviewed-by: Tao Zhou <tao.zhou1@xxxxxxx>
> -----Original Message-----
> From: Stanley.Yang <Stanley.Yang@xxxxxxx>
> Sent: Friday, February 11, 2022 6:15 PM
> To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx; Zhang, Hawking
> <Hawking.Zhang@xxxxxxx>; Clements, John <John.Clements@xxxxxxx>;
> Zhou1, Tao <Tao.Zhou1@xxxxxxx>
> Cc: Yang, Stanley <Stanley.Yang@xxxxxxx>
> Subject: [PATCH Review 1/1] drm/amdgpu: adjust register address calculation
>
> the UMC_STATUS register is not liner, adjust offset calculation formula to get
[Tao]: typo, liner -> linear
> correct address
>
> Change-Id: Ic8926078301848330babf289c4238dc8cbcf313d
> Signed-off-by: Stanley.Yang <Stanley.Yang@xxxxxxx>
> ---
> drivers/gpu/drm/amd/amdgpu/umc_v6_7.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v6_7.c
> b/drivers/gpu/drm/amd/amdgpu/umc_v6_7.c
> index e613511e07e1..87e4ef18e151 100644
> --- a/drivers/gpu/drm/amd/amdgpu/umc_v6_7.c
> +++ b/drivers/gpu/drm/amd/amdgpu/umc_v6_7.c
> @@ -47,6 +47,13 @@ static inline uint32_t get_umc_v6_7_reg_offset(struct
> amdgpu_device *adev,
> uint32_t umc_inst,
> uint32_t ch_inst)
> {
> + uint32_t index = umc_inst * adev->umc.channel_inst_num + ch_inst;
> +
> + /* adjust umc and channel index offset,
> + * the register address is not linear on each umc instace */
> + umc_inst = index / 4;
> + ch_inst = index % 4;
> +
> return adev->umc.channel_offs * ch_inst + UMC_V6_7_INST_DIST *
> umc_inst; }
>
> --
> 2.17.1
