This reverts commit 733a212f20dfa14fa20814f21526fb180f25fdd8. --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 24 ++----------------- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 2 +- .../gpu/drm/amd/display/dc/core/dc_resource.c | 2 +- .../gpu/drm/amd/display/include/dal_asic_id.h | 3 +-- 4 files changed, 5 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index f5941e59e5ad..8f53c9f6b267 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -1014,14 +1014,6 @@ static void amdgpu_dm_audio_eld_notify(struct amdgpu_device *adev, int pin) } } -bool is_skillfish_series(struct amdgpu_device *adev) -{ - if (adev->asic_type == CHIP_CYAN_SKILLFISH || adev->pdev->revision == 0x143F) { - return true; - } - return false; -} - static int dm_dmub_hw_init(struct amdgpu_device *adev) { const struct dmcub_firmware_header_v1_0 *hdr; @@ -1057,7 +1049,7 @@ static int dm_dmub_hw_init(struct amdgpu_device *adev) return -EINVAL; } - if (is_skillfish_series(adev)) { + if (!has_hw_support) { DRM_INFO("DMUB unsupported on ASIC\n"); return 0; } @@ -1479,10 +1471,6 @@ static int amdgpu_dm_init(struct amdgpu_device *adev) default: break; } - if (is_skillfish_series(adev)) { - init_data.flags.disable_dmcu = true; - break; - } break; } @@ -1789,6 +1777,7 @@ static int load_dmcu_fw(struct amdgpu_device *adev) case CHIP_VEGA10: case CHIP_VEGA12: case CHIP_VEGA20: + return 0; case CHIP_NAVI12: fw_name_dmcu = FIRMWARE_NAVI12_DMCU; break; @@ -1816,9 +1805,6 @@ static int load_dmcu_fw(struct amdgpu_device *adev) default: break; } - if (is_skillfish_series(adev)) { - return 0; - } DRM_ERROR("Unsupported ASIC type: 0x%X\n", adev->asic_type); return -EINVAL; } @@ -4529,12 +4515,6 @@ static int dm_early_init(void *handle) adev->mode_info.num_dig = 6; break; default: - if (is_skillfish_series(adev)) { - adev->mode_info.num_crtc = 2; - adev->mode_info.num_hpd = 2; - adev->mode_info.num_dig = 2; - break; - } #if defined(CONFIG_DRM_AMD_DC_DCN) switch (adev->ip_versions[DCE_HWIP][0]) { case IP_VERSION(2, 0, 2): diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h index 13875d669acd..e35977fda5c1 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h @@ -82,7 +82,7 @@ struct common_irq_params { enum dc_irq_source irq_src; atomic64_t previous_timestamp; }; -bool is_skillfish_series(struct amdgpu_device *adev); + /** * struct dm_compressor_info - Buffer info used by frame buffer compression * @cpu_addr: MMIO cpu addr diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c index 318d381e2910..b36bae4b5bc9 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c @@ -135,7 +135,7 @@ enum dce_version resource_parse_asic_id(struct hw_asic_id asic_id) case FAMILY_NV: dc_version = DCN_VERSION_2_0; - if (asic_id.chip_id == DEVICE_ID_NV_NAVI10_LITE_P_13FE || asic_id.chip_id == DEVICE_ID_NV_NAVI10_LITE_P_143F) { + if (asic_id.chip_id == DEVICE_ID_NV_13FE) { dc_version = DCN_VERSION_2_01; break; } diff --git a/drivers/gpu/drm/amd/display/include/dal_asic_id.h b/drivers/gpu/drm/amd/display/include/dal_asic_id.h index 37ec6343dbd6..e4a2dfacab4c 100644 --- a/drivers/gpu/drm/amd/display/include/dal_asic_id.h +++ b/drivers/gpu/drm/amd/display/include/dal_asic_id.h @@ -211,8 +211,7 @@ enum { #ifndef ASICREV_IS_GREEN_SARDINE #define ASICREV_IS_GREEN_SARDINE(eChipRev) ((eChipRev >= GREEN_SARDINE_A0) && (eChipRev < 0xFF)) #endif -#define DEVICE_ID_NV_NAVI10_LITE_P_13FE 0x13FE // CYAN_SKILLFISH -#define DEVICE_ID_NV_NAVI10_LITE_P_143F 0x143F +#define DEVICE_ID_NV_13FE 0x13FE // CYAN_SKILLFISH #define FAMILY_VGH 144 #define DEVICE_ID_VGH_163F 0x163F #define VANGOGH_A0 0x01 -- 2.25.1