Acked-by: Alex Deucher <alexander.deucher@xxxxxxx>
On Tue, Jan 25, 2022 at 4:00 AM Evan Quan <evan.quan@xxxxxxx> wrote:
>
> As other dGPU asics, Renoir should use smu_cmn_get_enabled_mask() for
> that job.
>
> Signed-off-by: Evan Quan <evan.quan@xxxxxxx>
> Change-Id: I9e845ba84dd45d0826506de44ef4760fa851a516
> ---
> drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
> index fcead7c6ca7e..c3c679bf9d9f 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
> @@ -710,7 +710,8 @@ size_t smu_cmn_get_pp_feature_mask(struct smu_context *smu,
> size_t size = 0;
> int ret = 0, i;
>
> - if (!smu->is_apu) {
> + if (!smu->is_apu ||
> + (smu->adev->asic_type == CHIP_RENOIR)) {
> ret = smu_cmn_get_enabled_mask(smu,
> feature_mask,
> 2);
> --
> 2.29.0
>
