Re: [PATCH] drm/amdgpu: switch to common helper to read bios from rom

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[AMD Official Use Only]


Reviewed-by: Yang Wang <kevinyang.wang@xxxxxxx>

Best Regards,
Kevin


From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> on behalf of Hawking Zhang <Hawking.Zhang@xxxxxxx>
Sent: Thursday, January 20, 2022 7:26 PM
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx <amd-gfx@xxxxxxxxxxxxxxxxxxxxx>; Deucher, Alexander <Alexander.Deucher@xxxxxxx>
Cc: Zhang, Hawking <Hawking.Zhang@xxxxxxx>
Subject: [PATCH] drm/amdgpu: switch to common helper to read bios from rom
 
create a common helper function for soc15 and onwards
to read bios image from rom

Signed-off-by: Hawking Zhang <Hawking.Zhang@xxxxxxx>
Reviewed-by: Lijo Lazar <lijo.lazar@xxxxxxx>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h      |  3 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c | 38 ++++++++++++++++++++++++
 drivers/gpu/drm/amd/amdgpu/nv.c          | 34 +--------------------
 drivers/gpu/drm/amd/amdgpu/soc15.c       | 37 ++---------------------
 4 files changed, 43 insertions(+), 69 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 8a7759147fb2..b2da840f4718 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -378,7 +378,8 @@ int amdgpu_device_ip_block_add(struct amdgpu_device *adev,
  */
 bool amdgpu_get_bios(struct amdgpu_device *adev);
 bool amdgpu_read_bios(struct amdgpu_device *adev);
-
+bool amdgpu_soc15_read_bios_from_rom(struct amdgpu_device *adev,
+                                    u8 *bios, u32 length_bytes);
 /*
  * Clocks
  */
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c
index ca0503d56e5c..a819828408fd 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c
@@ -476,3 +476,41 @@ bool amdgpu_get_bios(struct amdgpu_device *adev)
         adev->is_atom_fw = (adev->asic_type >= CHIP_VEGA10) ? true : false;
         return true;
 }
+
+/* helper function for soc15 and onwards to read bios from rom */
+bool amdgpu_soc15_read_bios_from_rom(struct amdgpu_device *adev,
+                                    u8 *bios, u32 length_bytes)
+{
+       u32 *dw_ptr;
+       u32 i, length_dw;
+       u32 rom_index_offset;
+       u32 rom_data_offset;
+
+       if (bios == NULL)
+               return false;
+       if (length_bytes == 0)
+               return false;
+       /* APU vbios image is part of sbios image */
+       if (adev->flags & AMD_IS_APU)
+               return false;
+       if (!adev->smuio.funcs ||
+           !adev->smuio.funcs->get_rom_index_offset ||
+           !adev->smuio.funcs->get_rom_data_offset)
+               return false;
+
+       dw_ptr = (u32 *)bios;
+       length_dw = ALIGN(length_bytes, 4) / 4;
+
+       rom_index_offset =
+               adev->smuio.funcs->get_rom_index_offset(adev);
+       rom_data_offset =
+               adev->smuio.funcs->get_rom_data_offset(adev);
+
+       /* set rom index to 0 */
+       WREG32(rom_index_offset, 0);
+       /* read out the rom data */
+       for (i = 0; i < length_dw; i++)
+               dw_ptr[i] = RREG32(rom_data_offset);
+
+       return true;
+}
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 3ccd3b42196a..e52d1114501c 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -358,38 +358,6 @@ static bool nv_read_disabled_bios(struct amdgpu_device *adev)
         return false;
 }
 
-static bool nv_read_bios_from_rom(struct amdgpu_device *adev,
-                                 u8 *bios, u32 length_bytes)
-{
-       u32 *dw_ptr;
-       u32 i, length_dw;
-       u32 rom_index_offset, rom_data_offset;
-
-       if (bios == NULL)
-               return false;
-       if (length_bytes == 0)
-               return false;
-       /* APU vbios image is part of sbios image */
-       if (adev->flags & AMD_IS_APU)
-               return false;
-
-       dw_ptr = (u32 *)bios;
-       length_dw = ALIGN(length_bytes, 4) / 4;
-
-       rom_index_offset =
-               adev->smuio.funcs->get_rom_index_offset(adev);
-       rom_data_offset =
-               adev->smuio.funcs->get_rom_data_offset(adev);
-
-       /* set rom index to 0 */
-       WREG32(rom_index_offset, 0);
-       /* read out the rom data */
-       for (i = 0; i < length_dw; i++)
-               dw_ptr[i] = RREG32(rom_data_offset);
-
-       return true;
-}
-
 static struct soc15_allowed_register_entry nv_allowed_read_registers[] = {
         { SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS)},
         { SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS2)},
@@ -707,7 +675,7 @@ static int nv_update_umd_stable_pstate(struct amdgpu_device *adev,
 static const struct amdgpu_asic_funcs nv_asic_funcs =
 {
         .read_disabled_bios = &nv_read_disabled_bios,
-       .read_bios_from_rom = &nv_read_bios_from_rom,
+       .read_bios_from_rom = &amdgpu_soc15_read_bios_from_rom,
         .read_register = &nv_read_register,
         .reset = &nv_asic_reset,
         .reset_method = &nv_asic_reset_method,
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 0fc1747e4a70..e5a1950fb862 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -375,39 +375,6 @@ static bool soc15_read_disabled_bios(struct amdgpu_device *adev)
         return false;
 }
 
-static bool soc15_read_bios_from_rom(struct amdgpu_device *adev,
-                                    u8 *bios, u32 length_bytes)
-{
-       u32 *dw_ptr;
-       u32 i, length_dw;
-       uint32_t rom_index_offset;
-       uint32_t rom_data_offset;
-
-       if (bios == NULL)
-               return false;
-       if (length_bytes == 0)
-               return false;
-       /* APU vbios image is part of sbios image */
-       if (adev->flags & AMD_IS_APU)
-               return false;
-
-       dw_ptr = (u32 *)bios;
-       length_dw = ALIGN(length_bytes, 4) / 4;
-
-       rom_index_offset =
-               adev->smuio.funcs->get_rom_index_offset(adev);
-       rom_data_offset =
-               adev->smuio.funcs->get_rom_data_offset(adev);
-
-       /* set rom index to 0 */
-       WREG32(rom_index_offset, 0);
-       /* read out the rom data */
-       for (i = 0; i < length_dw; i++)
-               dw_ptr[i] = RREG32(rom_data_offset);
-
-       return true;
-}
-
 static struct soc15_allowed_register_entry soc15_allowed_read_registers[] = {
         { SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS)},
         { SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS2)},
@@ -925,7 +892,7 @@ static void soc15_pre_asic_init(struct amdgpu_device *adev)
 static const struct amdgpu_asic_funcs soc15_asic_funcs =
 {
         .read_disabled_bios = &soc15_read_disabled_bios,
-       .read_bios_from_rom = &soc15_read_bios_from_rom,
+       .read_bios_from_rom = &amdgpu_soc15_read_bios_from_rom,
         .read_register = &soc15_read_register,
         .reset = &soc15_asic_reset,
         .reset_method = &soc15_asic_reset_method,
@@ -947,7 +914,7 @@ static const struct amdgpu_asic_funcs soc15_asic_funcs =
 static const struct amdgpu_asic_funcs vega20_asic_funcs =
 {
         .read_disabled_bios = &soc15_read_disabled_bios,
-       .read_bios_from_rom = &soc15_read_bios_from_rom,
+       .read_bios_from_rom = &amdgpu_soc15_read_bios_from_rom,
         .read_register = &soc15_read_register,
         .reset = &soc15_asic_reset,
         .reset_method = &soc15_asic_reset_method,
--
2.17.1


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