Re: [PATCH] drm/amdgpu: force using sdma to update vm page table when mmio is blocked

["Wang, Yang(Kevin)" <KevinYang.Wang@xxxxxxx>]

[AMD Official Use Only]

Hi Chris,

yes, I agree with your point.

and another way is that we can use KIQ to write HDP register to resolve HDP can't R/W issue.

but it will cause some performance drop if use KIQ to programing register.

what is your ideas?

Best Regards,

Kevin

---

From: Koenig, Christian <Christian.Koenig@xxxxxxx>
Sent: Thursday, January 20, 2022 4:58 PM
To: Wang, Yang(Kevin) <KevinYang.Wang@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx <amd-gfx@xxxxxxxxxxxxxxxxxxxxx>; Deucher, Alexander <Alexander.Deucher@xxxxxxx>; Liu, Monk <Monk.Liu@xxxxxxx>
Cc: Min, Frank <Frank.Min@xxxxxxx>; Chen, Horace <Horace.Chen@xxxxxxx>
Subject: Re: [PATCH] drm/amdgpu: force using sdma to update vm page table when mmio is blocked

 

Well NAK.

Even when we can't R/W HDP registers we need a way to invalidate the HDP or quite a bunch of functions won't work correctly.

Blocking CPU base page table updates only works around the symptoms, but doesn't really solve anything.

Regards,
Christian.

Am 20.01.22 um 09:46 schrieb Wang, Yang(Kevin):

[AMD Official Use Only]

ping...

add @Liu, Monk @Koenig, Christian @Deucher, Alexander

Best Regards,

Kevin

---

From: Wang, Yang(Kevin) <KevinYang.Wang@xxxxxxx>
Sent: Wednesday, January 19, 2022 11:16 AM
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx <amd-gfx@xxxxxxxxxxxxxxxxxxxxx>
Cc: Min, Frank <Frank.Min@xxxxxxx>; Chen, Horace <Horace.Chen@xxxxxxx>; Wang, Yang(Kevin) <KevinYang.Wang@xxxxxxx>
Subject: [PATCH] drm/amdgpu: force using sdma to update vm page table when mmio is blocked

 

when mmio protection feature is enabled in hypervisor,
it will cause guest OS can't R/W HDP regiters,
and using cpu to update page table is not working well.

force using sdma to update page table when mmio is blocked.

Signed-off-by: Yang Wang <KevinYang.Wang@xxxxxxx>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index b23cb463b106..0f86f0b2e183 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -2959,6 +2959,9 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm)
         vm->use_cpu_for_update = !!(adev->vm_manager.vm_update_mode &
                                     AMDGPU_VM_USE_CPU_FOR_GFX);
 
+       if (vm->use_cpu_for_update && amdgpu_sriov_vf(adev) && amdgpu_virt_mmio_blocked(adev))
+               vm->use_cpu_for_update = false;
+
         DRM_DEBUG_DRIVER("VM update mode is %s\n",
                          vm->use_cpu_for_update ? "CPU" : "SDMA");
         WARN_ONCE((vm->use_cpu_for_update &&
@@ -3094,6 +3097,10 @@ int amdgpu_vm_make_compute(struct amdgpu_device *adev, struct amdgpu_vm *vm)
         /* Update VM state */
         vm->use_cpu_for_update = !!(adev->vm_manager.vm_update_mode &
                                     AMDGPU_VM_USE_CPU_FOR_COMPUTE);
+
+       if (vm->use_cpu_for_update && amdgpu_sriov_vf(adev) && amdgpu_virt_mmio_blocked(adev))
+               vm->use_cpu_for_update = false;
+
         DRM_DEBUG_DRIVER("VM update mode is %s\n",
                          vm->use_cpu_for_update ? "CPU" : "SDMA");
         WARN_ONCE((vm->use_cpu_for_update &&
--
2.25.1