[AMD Official Use Only]
-----Original Message-----
From: Liu, Zhan <Zhan.Liu@xxxxxxx>
Sent: Wednesday, January 19, 2022 5:17 PM
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Liu, Charlene <Charlene.Liu@xxxxxxx>; Cornij, Nikola <Nikola.Cornij@xxxxxxx>; Gutierrez, Agustin <Agustin.Gutierrez@xxxxxxx>; Pierre-Loup Griffais <pgriffais@xxxxxxxxxxxxxxxxx>; Kotarac, Pavle <Pavle.Kotarac@xxxxxxx>
Subject: [PATCH] drm/amd/display: Correct MPC split policy for DCN301
[AMD Official Use Only]
[Why]
DCN301 has seamless boot enabled. With MPC split enabled at the same time, system will hang.
[How]
Revert MPC split policy back to "MPC_SPLIT_AVOID". Since we have ODM combine enabled on DCN301, pipe split is not necessary here.
Signed-off-by: Zhan Liu <zhan.liu@xxxxxxx>
Reviewed-by: Charlene Liu <charlene.liu@xxxxxxx>
---
drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
index c1c6e602b06c..b4001233867c 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
@@ -686,7 +686,7 @@ static const struct dc_debug_options debug_defaults_drv = {
.disable_clock_gate = true,
.disable_pplib_clock_request = true,
.disable_pplib_wm_range = true,
- .pipe_split_policy = MPC_SPLIT_DYNAMIC,
+ .pipe_split_policy = MPC_SPLIT_AVOID,
.force_single_disp_pipe_split = false,
.disable_dcc = DCC_ENABLE,
.vsr_support = true,
--
2.25.1
