From: Felipe Clark <felclark@xxxxxxx>
[WHY]
With some monitors when multi plane overlay is enabled the memory
clock switching mechanism has to change and, due to an error in the
initialization sequence, it may cause a black screen.
[HOW]
Change the firmware assisted memory clock switch initialization and
tear-down sequence utilizing the prepare_bandwidth and
optimize_bandwidth contexts.
Reviewed-by: Aric Cyr <Aric.Cyr@xxxxxxx>
Acked-by: Wayne Lin <wayne.lin@xxxxxxx>
Signed-off-by: Felipe Clark <feclark@xxxxxxx>
---
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c | 5 +++++
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.h | 3 +++
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c | 2 +-
3 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
index ed0a0e5fd805..dec8604a0612 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
@@ -355,6 +355,11 @@ void dcn30_prepare_bandwidth(struct dc *dc,
dcn20_prepare_bandwidth(dc, context);
}
+void dcn30_optimize_bandwidth(struct dc *dc, struct dc_state *context)
+{
+ dcn20_optimize_bandwidth(dc, context);
+}
+
void dcn30_disable_writeback(
struct dc *dc,
unsigned int dwb_pipe_inst)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.h b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.h
index 73e7b690e82c..357ee14711ad 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.h
@@ -50,6 +50,9 @@ void dcn30_disable_writeback(
void dcn30_prepare_bandwidth(struct dc *dc,
struct dc_state *context);
+void dcn30_optimize_bandwidth(struct dc *dc,
+ struct dc_state *context);
+
bool dcn30_mmhubbub_warmup(
struct dc *dc,
unsigned int num_dwb,
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c
index bb347319de83..73a416cba563 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c
@@ -60,7 +60,7 @@ static const struct hw_sequencer_funcs dcn30_funcs = {
.interdependent_update_lock = dcn10_lock_all_pipes,
.cursor_lock = dcn10_cursor_lock,
.prepare_bandwidth = dcn20_prepare_bandwidth,
- .optimize_bandwidth = dcn20_optimize_bandwidth,
+ .optimize_bandwidth = dcn30_optimize_bandwidth,
.update_bandwidth = dcn20_update_bandwidth,
.set_drr = dcn10_set_drr,
.get_position = dcn10_get_position,
--
2.25.1
