[PATCH 05/10] drm/amd/display: Force det buf size to 192KB with 3+ streams and upscaling

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From: Michael Strauss <michael.strauss@xxxxxxx>

[WHY]
This workaround resolves underflow caused by incorrect DST_Y_PREFETCH.
Overriding to 192KB DET buf size until the DST_Y_PREFETCH calc is fixed.

Reviewed-by: Eric Yang <Eric.Yang2@xxxxxxx>
Acked-by: Pavle Kotarac <Pavle.Kotarac@xxxxxxx>
Signed-off-by: Michael Strauss <michael.strauss@xxxxxxx>
---
 drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
index 04b52c9d18da..a99800146c9d 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
@@ -1770,6 +1770,7 @@ static int dcn31_populate_dml_pipes_from_context(
 	int i, pipe_cnt;
 	struct resource_context *res_ctx = &context->res_ctx;
 	struct pipe_ctx *pipe;
+	bool upscaled = false;
 
 	dcn20_populate_dml_pipes_from_context(dc, context, pipes, fast_validate);
 
@@ -1781,6 +1782,11 @@ static int dcn31_populate_dml_pipes_from_context(
 		pipe = &res_ctx->pipe_ctx[i];
 		timing = &pipe->stream->timing;
 
+		if (pipe->plane_state &&
+				(pipe->plane_state->src_rect.height < pipe->plane_state->dst_rect.height ||
+				pipe->plane_state->src_rect.width < pipe->plane_state->dst_rect.width))
+			upscaled = true;
+
 		/*
 		 * Immediate flip can be set dynamically after enabling the plane.
 		 * We need to require support for immediate flip or underflow can be
@@ -1828,6 +1834,8 @@ static int dcn31_populate_dml_pipes_from_context(
 	} else if (context->stream_count >= dc->debug.crb_alloc_policy_min_disp_count
 			&& dc->debug.crb_alloc_policy > DET_SIZE_DEFAULT) {
 		context->bw_ctx.dml.ip.det_buffer_size_kbytes = dc->debug.crb_alloc_policy * 64;
+	} else if (context->stream_count >= 3 && upscaled) {
+		context->bw_ctx.dml.ip.det_buffer_size_kbytes = 192;
 	}
 
 	return pipe_cnt;
-- 
2.32.0




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