Re: [PATCH] drm/amdgpu: handle SRIOV VCN revision parsing

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Am 01.12.21 um 22:35 schrieb Alex Deucher:
For SR-IOV, the IP discovery revision number encodes
additional information.  Handle that case here.

v2: drop additional IP versions

Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>

I was already wondering why SRIOV needs special handling for the revision, going to keep an eye open for more stuff like that.

Acked-by: Christian König <christian.koenig@xxxxxxx>

---
  drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 17 ++++++++++++++---
  drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c       |  2 --
  drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h       |  1 +
  drivers/gpu/drm/amd/amdgpu/nv.c               |  2 --
  4 files changed, 15 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index ea00090b3fb3..552031950518 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
@@ -379,8 +379,21 @@ int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev)
  				  ip->major, ip->minor,
  				  ip->revision);
- if (le16_to_cpu(ip->hw_id) == VCN_HWID)
+			if (le16_to_cpu(ip->hw_id) == VCN_HWID) {
+				if (amdgpu_sriov_vf(adev)) {
+					/* SR-IOV modifies each VCN’s revision (uint8)
+					 * Bit [5:0]: original revision value
+					 * Bit [7:6]: en/decode capability:
+					 *     0b00 : VCN function normally
+					 *     0b10 : encode is disabled
+					 *     0b01 : decode is disabled
+					 */
+					adev->vcn.sriov_config[adev->vcn.num_vcn_inst] =
+						(ip->revision & 0xc0) >> 6;
+					ip->revision &= ~0xc0;
+				}
  				adev->vcn.num_vcn_inst++;
+			}
  			if (le16_to_cpu(ip->hw_id) == SDMA0_HWID ||
  			    le16_to_cpu(ip->hw_id) == SDMA1_HWID ||
  			    le16_to_cpu(ip->hw_id) == SDMA2_HWID ||
@@ -917,10 +930,8 @@ static int amdgpu_discovery_set_mm_ip_blocks(struct amdgpu_device *adev)
  			break;
  		case IP_VERSION(3, 0, 0):
  		case IP_VERSION(3, 0, 16):
-		case IP_VERSION(3, 0, 64):
  		case IP_VERSION(3, 1, 1):
  		case IP_VERSION(3, 0, 2):
-		case IP_VERSION(3, 0, 192):
  			amdgpu_device_ip_block_add(adev, &vcn_v3_0_ip_block);
  			if (!amdgpu_sriov_vf(adev))
  				amdgpu_device_ip_block_add(adev, &jpeg_v3_0_ip_block);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
index 585961c2f5f2..2658414c503d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
@@ -134,8 +134,6 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
  			adev->vcn.indirect_sram = true;
  		break;
  	case IP_VERSION(3, 0, 0):
-	case IP_VERSION(3, 0, 64):
-	case IP_VERSION(3, 0, 192):
  		if (adev->ip_versions[GC_HWIP][0] == IP_VERSION(10, 3, 0))
  			fw_name = FIRMWARE_SIENNA_CICHLID;
  		else
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
index bfa27ea94804..938a5ead3f20 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
@@ -235,6 +235,7 @@ struct amdgpu_vcn {
uint8_t num_vcn_inst;
  	struct amdgpu_vcn_inst	 inst[AMDGPU_MAX_VCN_INSTANCES];
+	uint8_t			 sriov_config[AMDGPU_MAX_VCN_INSTANCES];
  	struct amdgpu_vcn_reg	 internal;
  	struct mutex		 vcn_pg_lock;
  	struct mutex		vcn1_jpeg1_workaround;
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 2ec1ffb36b1f..7088528079c6 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -182,8 +182,6 @@ static int nv_query_video_codecs(struct amdgpu_device *adev, bool encode,
  {
  	switch (adev->ip_versions[UVD_HWIP][0]) {
  	case IP_VERSION(3, 0, 0):
-	case IP_VERSION(3, 0, 64):
-	case IP_VERSION(3, 0, 192):
  		if (amdgpu_sriov_vf(adev)) {
  			if (encode)
  				*codecs = &sriov_sc_video_codecs_encode;




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