1.Modify hdp block to fit for the unified ras block data and ops.
2.Implement .ras_block_match function pointer for hdp block to identify itself.
3.Change amdgpu_hdp_ras_funcs to amdgpu_hdp_ras, and the corresponding variable name remove _funcs suffix.
4.Remove the const flag of hdp ras variable so that hdp ras block can be able to be insertted into amdgpu device ras block link list.
5.Invoke amdgpu_ras_register_ras_block function to register hdp ras block into amdgpu device ras block link list.
6.Remove the redundant code about hdp in amdgpu_ras.c after using the unified ras block.
Signed-off-by: yipechai <YiPeng.Chai@xxxxxxx>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 12 ++++++------
drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h | 11 ++++-------
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 16 ++++++++--------
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 9 +++++----
drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c | 22 +++++++++++++++++++++-
drivers/gpu/drm/amd/amdgpu/hdp_v4_0.h | 2 +-
6 files changed, 45 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index 3ba2f0f1f1b4..0d06e7a2b951 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
@@ -460,9 +460,9 @@ int amdgpu_gmc_ras_late_init(struct amdgpu_device *adev)
return r;
}
- if (adev->hdp.ras_funcs &&
- adev->hdp.ras_funcs->ras_late_init) {
- r = adev->hdp.ras_funcs->ras_late_init(adev);
+ if (adev->hdp.ras && adev->hdp.ras->ras_block.ops &&
+ adev->hdp.ras->ras_block.ops->ras_late_init) {
+ r = adev->hdp.ras->ras_block.ops->ras_late_init(adev);
if (r)
return r;
}
@@ -505,9 +505,9 @@ void amdgpu_gmc_ras_fini(struct amdgpu_device *adev)
adev->gmc.xgmi.ras->ras_block.ops->ras_fini)
adev->gmc.xgmi.ras->ras_block.ops->ras_fini(adev);
- if (adev->hdp.ras_funcs &&
- adev->hdp.ras_funcs->ras_fini)
- adev->hdp.ras_funcs->ras_fini(adev);
+ if (adev->hdp.ras && adev->hdp.ras->ras_block.ops &&
+ adev->hdp.ras->ras_block.ops->ras_fini)
+ adev->hdp.ras->ras_block.ops->ras_fini(adev);
}
/*
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h
index 7ec99d591584..6e53898fb283 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h
@@ -22,13 +22,10 @@
*/
#ifndef __AMDGPU_HDP_H__
#define __AMDGPU_HDP_H__
+#include "amdgpu_ras.h"
-struct amdgpu_hdp_ras_funcs {
- int (*ras_late_init)(struct amdgpu_device *adev);
- void (*ras_fini)(struct amdgpu_device *adev);
- void (*query_ras_error_count)(struct amdgpu_device *adev,
- void *ras_error_status);
- void (*reset_ras_error_count)(struct amdgpu_device *adev);
+struct amdgpu_hdp_ras{
+ struct amdgpu_ras_block_object ras_block;
};
struct amdgpu_hdp_funcs {
@@ -43,7 +40,7 @@ struct amdgpu_hdp_funcs {
struct amdgpu_hdp {
struct ras_common_if *ras_if;
const struct amdgpu_hdp_funcs *funcs;
- const struct amdgpu_hdp_ras_funcs *ras_funcs;
+ struct amdgpu_hdp_ras *ras;
};
int amdgpu_hdp_ras_late_init(struct amdgpu_device *adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index a6a2f928c6ca..bed414404c6f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -970,6 +970,7 @@ int amdgpu_ras_query_error_status(struct amdgpu_device *adev,
adev->nbio.ras_funcs->query_ras_error_count(adev, &err_data);
break;
case AMDGPU_RAS_BLOCK__XGMI_WAFL:
+ case AMDGPU_RAS_BLOCK__HDP:
if (!block_obj || !block_obj->ops) {
dev_info(adev->dev, "%s don't config ras function \n",
get_ras_block_str(&info->head));
@@ -978,11 +979,6 @@ int amdgpu_ras_query_error_status(struct amdgpu_device *adev,
if (block_obj->ops->query_ras_error_count)
block_obj->ops->query_ras_error_count(adev, &err_data);
break;
- case AMDGPU_RAS_BLOCK__HDP:
- if (adev->hdp.ras_funcs &&
- adev->hdp.ras_funcs->query_ras_error_count)
- adev->hdp.ras_funcs->query_ras_error_count(adev, &err_data);
- break;
case AMDGPU_RAS_BLOCK__MCA:
amdgpu_ras_mca_query_error_status(adev, &info->head, &err_data);
break;
@@ -1074,9 +1070,13 @@ int amdgpu_ras_reset_error_status(struct amdgpu_device *adev,
adev->sdma.funcs->reset_ras_error_count(adev);
break;
case AMDGPU_RAS_BLOCK__HDP:
- if (adev->hdp.ras_funcs &&
- adev->hdp.ras_funcs->reset_ras_error_count)
- adev->hdp.ras_funcs->reset_ras_error_count(adev);
+ if (!block_obj || !block_obj->ops) {
+ dev_info(adev->dev, "%s don't config ras function \n", ras_block_str(block));
+ return -EINVAL;
+ }
+
+ if (block_obj->ops->reset_ras_error_count)
+ block_obj->ops->reset_ras_error_count(adev);
break;
default:
break;
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 3606d2cbff5e..c66dc13e256f 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1223,7 +1223,8 @@ static void gmc_v9_0_set_gfxhub_funcs(struct amdgpu_device *adev)
static void gmc_v9_0_set_hdp_ras_funcs(struct amdgpu_device *adev)
{
- adev->hdp.ras_funcs = &hdp_v4_0_ras_funcs;
+ adev->hdp.ras = &hdp_v4_0_ras;
+ amdgpu_ras_register_ras_block(adev, &adev->hdp.ras->ras_block);
}
static void gmc_v9_0_set_mca_funcs(struct amdgpu_device *adev)
@@ -1300,9 +1301,9 @@ static int gmc_v9_0_late_init(void *handle)
adev->mmhub.ras_funcs->reset_ras_error_count)
adev->mmhub.ras_funcs->reset_ras_error_count(adev);
- if (adev->hdp.ras_funcs &&
- adev->hdp.ras_funcs->reset_ras_error_count)
- adev->hdp.ras_funcs->reset_ras_error_count(adev);
+ if (adev->hdp.ras && adev->hdp.ras->ras_block.ops &&
+ adev->hdp.ras->ras_block.ops->reset_ras_error_count)
+ adev->hdp.ras->ras_block.ops->reset_ras_error_count(adev);
}
r = amdgpu_gmc_ras_late_init(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c b/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c
index 74b90cc2bf48..8b15843ea52a 100644
--- a/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c
@@ -149,13 +149,33 @@ static void hdp_v4_0_init_registers(struct amdgpu_device *adev)
WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE_HI, (adev->gmc.vram_start >> 40));
}
-const struct amdgpu_hdp_ras_funcs hdp_v4_0_ras_funcs = {
+static int hdp_v4_0_ras_block_match(struct amdgpu_ras_block_object* block_obj, enum amdgpu_ras_block block, uint32_t sub_block_index)
+{
+ if(!block_obj)
+ return -EINVAL;
+
+ if(block_obj->block == block) {
+ return 0;
+ }
+ return -EINVAL;
+}
+
+struct amdgpu_ras_block_ops hdp_v4_0_ras_ops = {
+ .ras_block_match = hdp_v4_0_ras_block_match,
.ras_late_init = amdgpu_hdp_ras_late_init,
.ras_fini = amdgpu_hdp_ras_fini,
.query_ras_error_count = hdp_v4_0_query_ras_error_count,
.reset_ras_error_count = hdp_v4_0_reset_ras_error_count,
};
+struct amdgpu_hdp_ras hdp_v4_0_ras = {
+ .ras_block = {
+ .name = "hdp",
+ .block = AMDGPU_RAS_BLOCK__HDP,
+ .ops = &hdp_v4_0_ras_ops,
+ },
+};
+
const struct amdgpu_hdp_funcs hdp_v4_0_funcs = {
.flush_hdp = hdp_v4_0_flush_hdp,
.invalidate_hdp = hdp_v4_0_invalidate_hdp,
diff --git a/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.h b/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.h
index dc3a1b81dd62..c44eee9282ab 100644
--- a/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.h
+++ b/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.h
@@ -27,6 +27,6 @@
#include "soc15_common.h"
extern const struct amdgpu_hdp_funcs hdp_v4_0_funcs;
-extern const struct amdgpu_hdp_ras_funcs hdp_v4_0_ras_funcs;
+extern struct amdgpu_hdp_ras hdp_v4_0_ras;
#endif
--
2.25.1
