[Public] Hi all, This week this patchset was tested on the following systems: HP Envy 360, with Ryzen 5 4500U, with the following display types: eDP 1080p 60hz, 4k 60hz (via USB-C to DP/HDMI), 1440p 144hz (via USB-C to DP/HDMI), 1680*1050 60hz (via USB-C to DP and then DP to DVI/VGA) AMD Ryzen 9 5900H, with the following display types: eDP 1080p 60hz, 4k 60hz (via USB-C to DP/HDMI), 1440p 144hz (via USB-C to DP/HDMI), 1680*1050 60hz (via USB-C to DP and then DP to DVI/VGA) Sapphire Pulse RX5700XT with the following display types: 4k 60hz (via DP/HDMI), 1440p 144hz (via DP/HDMI), 1680*1050 60hz (via DP to DVI/VGA) Reference AMD RX6800 with the following display types: 4k 60hz (via DP/HDMI and USB-C to DP/HDMI), 1440p 144hz (via USB-C to DP/HDMI and USB-C to DP/HDMI), 1680*1050 60hz (via DP to DVI/VGA) Included testing using a Startech DP 1.4 MST hub at 2x 4k 60hz, and 3x 1080p 60hz on all systems. Also tested DSC via USB-C to DP DSC Hub with 3x 4k 60hz on Ryzen 9 5900h and Ryzen 5 4500u. Tested on Ubuntu 20.04.3 with Kernel Version 5.13 and ChromeOS Tested-by: Daniel Wheeler <daniel.wheeler@xxxxxxx> Thank you, Dan Wheeler Technologist | AMD SW Display ------------------------------------------------------------------------------------------------------------------ 1 Commerce Valley Dr E, Thornhill, ON L3T 7X6 Facebook | Twitter | amd.com -----Original Message----- From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Wayne Lin Sent: November 11, 2021 7:54 PM To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx Cc: Wang, Chao-kai (Stylon) <Stylon.Wang@xxxxxxx>; Li, Sun peng (Leo) <Sunpeng.Li@xxxxxxx>; Wentland, Harry <Harry.Wentland@xxxxxxx>; Zhuo, Qingqing <Qingqing.Zhuo@xxxxxxx>; Siqueira, Rodrigo <Rodrigo.Siqueira@xxxxxxx>; Li, Roman <Roman.Li@xxxxxxx>; Chiu, Solomon <Solomon.Chiu@xxxxxxx>; Pillai, Aurabindo <Aurabindo.Pillai@xxxxxxx>; Lin, Wayne <Wayne.Lin@xxxxxxx>; Lipski, Mikita <Mikita.Lipski@xxxxxxx>; Lakha, Bhawanpreet <Bhawanpreet.Lakha@xxxxxxx>; Gutierrez, Agustin <Agustin.Gutierrez@xxxxxxx>; Kotarac, Pavle <Pavle.Kotarac@xxxxxxx> Subject: [PATCH 00/14] DC Patches November 12, 2021 This DC patchset brings improvements in multiple areas. In summary, we highlight: - Fix issue that secondary display goes blank on Non DCN31. - Adjust flushing data in DMCUB - Revert patches which cause regression in hadnling MPO/Link encoder assignment - Correct the setting within MSA of DP2.0 - Adjustment for DML isolation - Fix FIFO erro in fast boot sequence - Enable DSC over eDP - Adjust the DSC power off sequence --- Ahmad Othman (1): drm/amd/display: Secondary display goes blank on Non DCN31 Angus Wang (1): drm/amd/display: Revert changes for MPO underflow Anthony Koo (2): drm/amd/display: [FW Promotion] Release 0.0.92 drm/amd/display: [FW Promotion] Release 0.0.93 Aric Cyr (1): drm/amd/display: 3.2.162 Brandon Syu (1): drm/amd/display: Fix eDP will flash when boot to OS Jun Lei (1): drm/amd/display: Code change for DML isolation Mikita Lipski (1): drm/amd/display: Enable DSC over eDP Nicholas Kazlauskas (1): drm/amd/display: Only flush delta from last command execution Sung Joon Kim (1): drm/amd/display: Revert "retain/release stream pointer in link enc table" Wenjing Liu (1): drm/amd/display: set MSA vsp/hsp to 0 for positive polarity for DP 128b/132b Xu, Jinze (1): drm/amd/display: Reset fifo after enable otg Yi-Ling Chen (1): drm/amd/display: fixed the DSC power off sequence during Driver PnP hvanzyll (1): drm/amd/display: Visual Confirm Bar Height Adjust .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 73 +- .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 2 +- drivers/gpu/drm/amd/display/dc/core/dc_link.c | 5 +- .../gpu/drm/amd/display/dc/core/dc_link_dp.c | 167 +- .../drm/amd/display/dc/core/dc_link_enc_cfg.c | 2 - drivers/gpu/drm/amd/display/dc/dc.h | 7 +- drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c | 1 + .../display/dc/dce110/dce110_hw_sequencer.c | 7 +- .../drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c | 14 +- .../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 37 + .../display/dc/dcn10/dcn10_stream_encoder.c | 15 + .../display/dc/dcn10/dcn10_stream_encoder.h | 3 + .../gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c | 2 + .../gpu/drm/amd/display/dc/dcn20/dcn20_optc.c | 14 + .../gpu/drm/amd/display/dc/dcn20/dcn20_optc.h | 3 + .../drm/amd/display/dc/dcn20/dcn20_resource.c | 2 +- .../display/dc/dcn20/dcn20_stream_encoder.c | 2 + .../dc/dcn30/dcn30_dio_stream_encoder.c | 2 + .../gpu/drm/amd/display/dc/dcn30/dcn30_optc.c | 1 + .../drm/amd/display/dc/dcn30/dcn30_resource.c | 2 +- .../amd/display/dc/dcn302/dcn302_resource.c | 2 +- .../amd/display/dc/dcn303/dcn303_resource.c | 2 +- .../dc/dcn31/dcn31_hpo_dp_stream_encoder.c | 4 +- .../drm/amd/display/dc/dcn31/dcn31_hwseq.c | 5 - .../gpu/drm/amd/display/dc/dcn31/dcn31_optc.c | 1 + .../drm/amd/display/dc/dcn31/dcn31_resource.c | 1 + .../drm/amd/display/dc/dml/display_mode_lib.h | 1 + .../gpu/drm/amd/display/dc/dml/dml_wrapper.c | 1889 +++++++++++++++++ .../display/dc/dml/dml_wrapper_translation.c | 284 +++ drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c | 8 + .../gpu/drm/amd/display/dc/inc/dml_wrapper.h | 34 + drivers/gpu/drm/amd/display/dc/inc/hw/dsc.h | 3 + .../amd/display/dc/inc/hw/stream_encoder.h | 4 + .../amd/display/dc/inc/hw/timing_generator.h | 2 + drivers/gpu/drm/amd/display/dmub/dmub_srv.h | 1 + .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 18 +- .../gpu/drm/amd/display/dmub/src/dmub_srv.c | 9 +- .../amd/display/include/ddc_service_types.h | 1 + 38 files changed, 2599 insertions(+), 31 deletions(-) create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dml_wrapper.c create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dml_wrapper_translation.c create mode 100644 drivers/gpu/drm/amd/display/dc/inc/dml_wrapper.h -- 2.25.1