Dear Alex,
On 28.10.21 00:19, Paul Menzel wrote:
On 27.10.21 20:23, Alex Deucher wrote:
On Wed, Oct 27, 2021 at 2:22 PM Alex Deucher
<alexander.deucher@xxxxxxx> wrote:
The DMA mask on SI parts is 40 bits not 44. Looks like a copy
paste typo.
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1762
Fixed locally.
As I have no way to reproduce this, as the ring gfx timeout error is
logged ten seconds after the IO_PAGE_FAULT, is very likely to be related?
Hopefully I am going to be able to test this on Friday. Does AMD’s QA
team have the cards to test the `iommu.forcedac=1` case? Is that test
case going to be added to the “test protocol”?
Lastly, should a Fixes tag be added, so it’s picked up for the stable
series?
Does the value of 44 need to be changed to 40 also five lines below?
- adev->need_swiotlb = drm_need_swiotlb(44);
+ adev->need_swiotlb = drm_need_swiotlb(40);
Kind regards,
Paul