Why using asic_type to check this? The issue is caused by the ip discovery series, and I thought that series' goal is to remove DID/asic_type as much as possible in kernel driver. + /* some IP discovery tables on NF don't have this set correctly */ + if (adev->asic_type == CHIP_NAVY_FLOUNDER) + adev->vcn.harvest_config |= AMDGPU_VCN_HARVEST_VCN1; Regards, Guchun -----Original Message----- From: Alex Deucher <alexdeucher@xxxxxxxxx> Sent: Thursday, October 21, 2021 10:02 PM To: Chen, Guchun <Guchun.Chen@xxxxxxx> Cc: amd-gfx list <amd-gfx@xxxxxxxxxxxxxxxxxxxxx>; Koenig, Christian <Christian.Koenig@xxxxxxx>; Pan, Xinhui <Xinhui.Pan@xxxxxxx>; Deucher, Alexander <Alexander.Deucher@xxxxxxx>; Liu, Leo <Leo.Liu@xxxxxxx> Subject: Re: [PATCH] drm/amdgpu: limit VCN instance number to 1 for NAVY_FLOUNDER Thanks. I think this patch set fixes it in a bit more future proof way: https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.freedesktop.org%2Fseries%2F96132%2F&data=04%7C01%7CGuchun.Chen%40amd.com%7C52fab5ccf8f64b6eb09b08d9949b548f%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637704217145304873%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=2KMrUDLZZ1s3colyVy1WwY4Yz6GbyI9z53qixn%2BuUwQ%3D&reserved=0 Alex On Thu, Oct 21, 2021 at 9:34 AM Chen, Guchun <Guchun.Chen@xxxxxxx> wrote: > > Additionally, in sienna_cichlid_dpm_set_vcn_enable, we also use num_vcn_inst to set dpm for VCN1 if it's > 1. > The main problem here is VCN harvest info is not set correctly, so vcn.harvest_config is not reliable in this case. > > if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_MM_DPM_PG_BIT)) { > ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_PowerUpVcn, 0, NULL); > if (ret) > return ret; > if (adev->vcn.num_vcn_inst > 1) { > ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_PowerUpVcn, > 0x10000, NULL); > if (ret) > return ret; > } > } > > Regards, > Guchun > > -----Original Message----- > From: Chen, Guchun > Sent: Thursday, October 21, 2021 9:14 PM > To: Alex Deucher <alexdeucher@xxxxxxxxx> > Cc: amd-gfx list <amd-gfx@xxxxxxxxxxxxxxxxxxxxx>; Koenig, Christian > <Christian.Koenig@xxxxxxx>; Pan, Xinhui <Xinhui.Pan@xxxxxxx>; Deucher, > Alexander <Alexander.Deucher@xxxxxxx>; Liu, Leo <Leo.Liu@xxxxxxx> > Subject: RE: [PATCH] drm/amdgpu: limit VCN instance number to 1 for > NAVY_FLOUNDER > > Hi Alex, > > No, it does not help. > > adev->vcn.harvest_config is 0 after retrieving harvest info from VBIOS. Looks that harvest info in VBIOs does not reflect the case that VCN1 is power gated. > > I checked several navy flounders SKUs, the observation is the same, so this is likely a common case. Perhaps we need to check with VBIOS/SMU guys. > > Regards, > Guchun > > -----Original Message----- > From: Alex Deucher <alexdeucher@xxxxxxxxx> > Sent: Thursday, October 21, 2021 9:06 PM > To: Chen, Guchun <Guchun.Chen@xxxxxxx> > Cc: amd-gfx list <amd-gfx@xxxxxxxxxxxxxxxxxxxxx>; Koenig, Christian > <Christian.Koenig@xxxxxxx>; Pan, Xinhui <Xinhui.Pan@xxxxxxx>; Deucher, > Alexander <Alexander.Deucher@xxxxxxx>; Liu, Leo <Leo.Liu@xxxxxxx> > Subject: Re: [PATCH] drm/amdgpu: limit VCN instance number to 1 for > NAVY_FLOUNDER > > On Thu, Oct 21, 2021 at 3:15 AM Guchun Chen <guchun.chen@xxxxxxx> wrote: > > > > VCN instance 1 is power gated permanently by SMU. > > > > Bug: > > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgi > > tl > > ab.freedesktop.org%2Fdrm%2Famd%2F-%2Fissues%2F1743&data=04%7C01% > > 7C > > guchun.chen%40amd.com%7Cda80a308a28049d543ad08d99493847d%7C3dd8961fe > > 48 > > 84e608e11a82d994e183d%7C0%7C0%7C637704183581593964%7CUnknown%7CTWFpb > > GZ > > sb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0 > > %3 > > D%7C1000&sdata=2vNLj9bXE2oV97rxBiUOiaFNpKopVSJefL%2BMcQE%2BSfo%3 > > D& > > amp;reserved=0 > > > > Fixes: f6b6d7d6bc2d("drm/amdgpu/vcn: remove manual instance > > setting") > > Signed-off-by: Guchun Chen <guchun.chen@xxxxxxx> > > Doesn't this patch effectively do the same thing? > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatc > hwork.freedesktop.org%2Fpatch%2F460329%2F&data=04%7C01%7CGuchun.Ch > en%40amd.com%7C52fab5ccf8f64b6eb09b08d9949b548f%7C3dd8961fe4884e608e11 > a82d994e183d%7C0%7C0%7C637704217145304873%7CUnknown%7CTWFpbGZsb3d8eyJW > IjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000& > amp;sdata=EmyT%2BNBnV8rIhJSqncnyFwR94smOvu2AGeb4vESFhdE%3D&reserve > d=0 Where else is num_vcn_inst used that it causes a problem? Or is > the VCN harvesting not set correctly on some navy flounders? > > Alex > > > --- > > drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 9 +++++++++ > > 1 file changed, 9 insertions(+) > > > > diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c > > b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c > > index dbfd92984655..4848922667f2 100644 > > --- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c > > +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c > > @@ -103,6 +103,15 @@ static int vcn_v3_0_early_init(void *handle) > > adev->vcn.num_enc_rings = 0; > > else > > adev->vcn.num_enc_rings = 2; > > + > > + /* > > + * Fix ME. > > + * VCN instance number is limited to 1 for below ASIC due to > > + * VCN instnace 1 is permanently power gated. > > + */ > > + if ((adev->ip_versions[UVD_HWIP][0] == IP_VERSION(3, 0, 0)) && > > + (adev->ip_versions[GC_HWIP][0] == IP_VERSION(10, 3, 2))) > > + adev->vcn.num_vcn_inst = 1; > > } > > > > vcn_v3_0_set_dec_ring_funcs(adev); > > -- > > 2.17.1 > >
