[AMD Official Use Only]
Reviewed-by: Evan Quan <evan.quan@xxxxxxx>
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Alex
> Deucher
> Sent: Wednesday, October 13, 2021 12:40 AM
> To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Deucher, Alexander <Alexander.Deucher@xxxxxxx>
> Subject: [PATCH] drm/amdgpu/gfx10: fix typo in
> gfx_v10_0_update_gfx_clock_gating()
>
> Check was incorrectly converted to IP version checking.
>
> Fixes: 4b0ad8425498ba ("drm/amdgpu/gfx10: convert to IP version checking")
> Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> index 71bb3c0dc1da..8cec03949835 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> @@ -8238,8 +8238,9 @@ static int
> gfx_v10_0_update_gfx_clock_gating(struct amdgpu_device *adev,
> /* === CGCG + CGLS === */
> gfx_v10_0_update_coarse_grain_clock_gating(adev, enable);
>
> - if ((adev->ip_versions[GC_HWIP][0] >= IP_VERSION(10, 1,
> 10)) &&
> - (adev->ip_versions[GC_HWIP][0] <= IP_VERSION(10, 1, 2)))
> + if ((adev->ip_versions[GC_HWIP][0] == IP_VERSION(10, 1,
> 10)) ||
> + (adev->ip_versions[GC_HWIP][0] == IP_VERSION(10, 1, 1))
> ||
> + (adev->ip_versions[GC_HWIP][0] == IP_VERSION(10, 1, 2)))
>
> gfx_v10_0_apply_medium_grain_clock_gating_workaround(adev);
> } else {
> /* CGCG/CGLS should be disabled before MGCG/MGLS
> --
> 2.31.1
