[Public]
Hi all,
This week this patchset was tested on the following systems:
HP Envy 360, with Ryzen 5 4500U, with the following display types: eDP 1080p 60hz, 4k 60hz (via USB-C to DP/HDMI), 1440p 144hz (via USB-C to DP/HDMI), 1680*1050 60hz (via USB-C to DP and then DP to DVI/VGA)
AMD Ryzen 9 5900H, with the following display types: eDP 1080p 60hz, 4k 60hz (via USB-C to DP/HDMI), 1440p 144hz (via USB-C to DP/HDMI), 1680*1050 60hz (via USB-C to DP and then DP to DVI/VGA)
Sapphire Pulse RX5700XT with the following display types:
4k 60hz (via DP/HDMI), 1440p 144hz (via DP/HDMI), 1680*1050 60hz (via DP to DVI/VGA)
Reference AMD RX6800 with the following display types:
4k 60hz (via DP/HDMI and USB-C to DP/HDMI), 1440p 144hz (via USB-C to DP/HDMI and USB-C to DP/HDMI), 1680*1050 60hz (via DP to DVI/VGA)
Included testing using a Startech DP 1.4 MST hub at 2x 4k 60hz, and 3x 1080p 60hz on all systems.
Tested-by: Daniel Wheeler <daniel.wheeler@xxxxxxx>
Thank you,
Dan Wheeler
Technologist | AMD
SW Display
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1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
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-----Original Message-----
From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Solomon Chiu
Sent: October 1, 2021 10:36 AM
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Wentland, Harry <Harry.Wentland@xxxxxxx>; Li, Sun peng (Leo) <Sunpeng.Li@xxxxxxx>; Lakha, Bhawanpreet <Bhawanpreet.Lakha@xxxxxxx>; Siqueira, Rodrigo <Rodrigo.Siqueira@xxxxxxx>; Pillai, Aurabindo <Aurabindo.Pillai@xxxxxxx>; Zhuo, Qingqing <Qingqing.Zhuo@xxxxxxx>; Lipski, Mikita <Mikita.Lipski@xxxxxxx>; Li, Roman <Roman.Li@xxxxxxx>; Jacob, Anson <Anson.Jacob@xxxxxxx>; Lin, Wayne <Wayne.Lin@xxxxxxx>; Wang, Chao-kai (Stylon) <Stylon.Wang@xxxxxxx>; Chiu, Solomon <Solomon.Chiu@xxxxxxx>
Subject: [PATCH 00/14] DC Patches October 1, 2021
This DC patchset brings improvements in multiple areas. In summary, we
highlight:
- New firmware version
- Fix DMUB problems on stress test.
- Improve link training by skip overrride for preferred link
- Refinement of FPU code structure for DCN2
- Fix 3DLUT skipped programming
- Fix detection of 4 lane for DPALT
- Fix dcn3 failure due to dmcbu_abm not created
- Limit display scaling to up to 4k for DCN 3.1
- Add helper for blanking all dp displays
Anthony Koo (1):
drm/amd/display: [FW Promotion] Release 0.0.87
Aric Cyr (2):
drm/amd/display: Fix 3DLUT skipped programming
drm/amd/display: 3.2.156
Charlene Liu (2):
drm/amd/display: update irq_service and other required change part 2.
drm/amd/display: dcn3 failed due to dmcbu_abm not created
George Shen (1):
drm/amd/display: Skip override for preferred link settings during link
training
Hansen (1):
drm/amd/display: Fix detection of 4 lane for DPALT
Jake Wang (1):
drm/amd/display: Added root clock optimization flags
Jimmy Kizito (1):
drm/amd/display: Fix concurrent dynamic encoder assignment.
Leo (Hanghong) Ma (2):
drm/amd/display: Add helper for blanking all dp displays
drm/amd/display: Fix error in dmesg at boot
Nikola Cornij (1):
drm/amd/display: Limit display scaling to up to 4k for DCN 3.1
Qingqing Zhuo (1):
drm/amd/display: Re-arrange FPU code structure for dcn2x
Wyatt Wood (1):
drm/amd/display: Prevent using DMUB rptr that is out-of-bounds
.../gpu/drm/amd/display/amdgpu_dm/dc_fpu.c | 2 +-
drivers/gpu/drm/amd/display/dc/core/dc.c | 4 ++
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 45 +++++++++++++++++++ .../gpu/drm/amd/display/dc/core/dc_link_dp.c | 6 ---
drivers/gpu/drm/amd/display/dc/dc.h | 21 ++++++++-
drivers/gpu/drm/amd/display/dc/dc_link.h | 1 +
.../gpu/drm/amd/display/dc/dce/dce_hwseq.h | 9 ++--
drivers/gpu/drm/amd/display/dc/dce/dce_opp.h | 1 + drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c | 17 ++++---
.../display/dc/dce110/dce110_hw_sequencer.c | 24 ++--------
.../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 41 ++--------------- .../drm/amd/display/dc/dcn20/dcn20_resource.c | 2 +-
.../amd/display/dc/dcn201/dcn201_resource.c | 2 +-
.../drm/amd/display/dc/dcn21/dcn21_resource.c | 2 +-
.../drm/amd/display/dc/dcn30/dcn30_hwseq.c | 39 ++--------------
.../display/dc/dcn31/dcn31_dio_link_encoder.c | 33 +++++++++++++- .../display/dc/dcn31/dcn31_dio_link_encoder.h | 3 ++
.../drm/amd/display/dc/dcn31/dcn31_hwseq.c | 39 ++--------------
.../drm/amd/display/dc/dcn31/dcn31_resource.c | 2 +-
drivers/gpu/drm/amd/display/dc/dml/Makefile | 4 +-
.../dml/{dcn2x/dcn2x.c => dcn20/dcn20_fpu.c} | 2 +- .../dml/{dcn2x/dcn2x.h => dcn20/dcn20_fpu.h} | 6 +--
drivers/gpu/drm/amd/display/dmub/dmub_srv.h | 1 +
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 4 +-
.../gpu/drm/amd/display/dmub/src/dmub_srv.c | 10 ++++-
25 files changed, 156 insertions(+), 164 deletions(-) rename drivers/gpu/drm/amd/display/dc/dml/{dcn2x/dcn2x.c => dcn20/dcn20_fpu.c} (99%) rename drivers/gpu/drm/amd/display/dc/dml/{dcn2x/dcn2x.h => dcn20/dcn20_fpu.h} (94%)
--
2.25.1
