Re: [PATCH 27/64] drm/amdgpu/nv: convert to IP version checking

[Christian König <ckoenig.leichtzumerken@xxxxxxxxx>]

Am 28.09.21 um 18:42 schrieb Alex Deucher:
> Use IP versions rather than asic_type to differentiate
> IP version specific features.
>
> Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>

Acked-by: Christian König <christian.koenig@xxxxxxx>

> ---
>   drivers/gpu/drm/amd/amdgpu/nv.c | 75 +++++++++++++++++----------------
>   1 file changed, 38 insertions(+), 37 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
> index 0dc390a7509f..57be517d70bf 100644
> --- a/drivers/gpu/drm/amd/amdgpu/nv.c
> +++ b/drivers/gpu/drm/amd/amdgpu/nv.c
> @@ -180,8 +180,8 @@ static const struct amdgpu_video_codecs yc_video_codecs_decode = {
>   static int nv_query_video_codecs(struct amdgpu_device *adev, bool encode,
>   				 const struct amdgpu_video_codecs **codecs)
>   {
> -	switch (adev->asic_type) {
> -	case CHIP_SIENNA_CICHLID:
> +	switch (adev->ip_versions[UVD_HWIP]) {
> +	case IP_VERSION(3, 0, 0):
>   		if (amdgpu_sriov_vf(adev)) {
>   			if (encode)
>   				*codecs = &sriov_sc_video_codecs_encode;
> @@ -194,29 +194,27 @@ static int nv_query_video_codecs(struct amdgpu_device *adev, bool encode,
>   				*codecs = &sc_video_codecs_decode;
>   		}
>   		return 0;
> -	case CHIP_NAVY_FLOUNDER:
> -	case CHIP_DIMGREY_CAVEFISH:
> -	case CHIP_VANGOGH:
> +	case IP_VERSION(3, 0, 16):
> +	case IP_VERSION(3, 0, 2):
>   		if (encode)
>   			*codecs = &nv_video_codecs_encode;
>   		else
>   			*codecs = &sc_video_codecs_decode;
>   		return 0;
> -	case CHIP_YELLOW_CARP:
> +	case IP_VERSION(3, 1, 1):
>   		if (encode)
>   			*codecs = &nv_video_codecs_encode;
>   		else
>   			*codecs = &yc_video_codecs_decode;
>   		return 0;
> -	case CHIP_BEIGE_GOBY:
> +	case IP_VERSION(3, 0, 33):
>   		if (encode)
>   			*codecs = &bg_video_codecs_encode;
>   		else
>   			*codecs = &bg_video_codecs_decode;
>   		return 0;
> -	case CHIP_NAVI10:
> -	case CHIP_NAVI14:
> -	case CHIP_NAVI12:
> +	case IP_VERSION(2, 0, 0):
> +	case IP_VERSION(2, 0, 2):
>   		if (encode)
>   			*codecs = &nv_video_codecs_encode;
>   		else
> @@ -511,14 +509,15 @@ nv_asic_reset_method(struct amdgpu_device *adev)
>   		dev_warn(adev->dev, "Specified reset method:%d isn't supported, using AUTO instead.\n",
>   				  amdgpu_reset_method);
>   
> -	switch (adev->asic_type) {
> -	case CHIP_VANGOGH:
> -	case CHIP_YELLOW_CARP:
> +	switch (adev->ip_versions[MP1_HWIP]) {
> +	case IP_VERSION(11, 5, 0):
> +	case IP_VERSION(13, 0, 1):
> +	case IP_VERSION(13, 0, 3):
>   		return AMD_RESET_METHOD_MODE2;
> -	case CHIP_SIENNA_CICHLID:
> -	case CHIP_NAVY_FLOUNDER:
> -	case CHIP_DIMGREY_CAVEFISH:
> -	case CHIP_BEIGE_GOBY:
> +	case IP_VERSION(11, 0, 7):
> +	case IP_VERSION(11, 0, 11):
> +	case IP_VERSION(11, 0, 12):
> +	case IP_VERSION(11, 0, 13):
>   		return AMD_RESET_METHOD_MODE1;
>   	default:
>   		if (amdgpu_dpm_is_baco_supported(adev))
> @@ -1042,8 +1041,11 @@ static int nv_common_early_init(void *handle)
>   
>   	adev->rev_id = nv_get_rev_id(adev);
>   	adev->external_rev_id = 0xff;
> -	switch (adev->asic_type) {
> -	case CHIP_NAVI10:
> +	/* TODO: split the GC and PG flags based on the relevant IP version for which
> +	 * they are relevant.
> +	 */
> +	switch (adev->ip_versions[GC_HWIP]) {
> +	case IP_VERSION(10, 1, 10):
>   		adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG |
>   			AMD_CG_SUPPORT_GFX_CGCG |
>   			AMD_CG_SUPPORT_IH_CG |
> @@ -1065,7 +1067,7 @@ static int nv_common_early_init(void *handle)
>   			AMD_PG_SUPPORT_ATHUB;
>   		adev->external_rev_id = adev->rev_id + 0x1;
>   		break;
> -	case CHIP_NAVI14:
> +	case IP_VERSION(10, 1, 1):
>   		adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG |
>   			AMD_CG_SUPPORT_GFX_CGCG |
>   			AMD_CG_SUPPORT_IH_CG |
> @@ -1086,7 +1088,7 @@ static int nv_common_early_init(void *handle)
>   			AMD_PG_SUPPORT_VCN_DPG;
>   		adev->external_rev_id = adev->rev_id + 20;
>   		break;
> -	case CHIP_NAVI12:
> +	case IP_VERSION(10, 1, 2):
>   		adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG |
>   			AMD_CG_SUPPORT_GFX_MGLS |
>   			AMD_CG_SUPPORT_GFX_CGCG |
> @@ -1115,7 +1117,7 @@ static int nv_common_early_init(void *handle)
>   			adev->rev_id = 0;
>   		adev->external_rev_id = adev->rev_id + 0xa;
>   		break;
> -	case CHIP_SIENNA_CICHLID:
> +	case IP_VERSION(10, 3, 0):
>   		adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG |
>   			AMD_CG_SUPPORT_GFX_CGCG |
>   			AMD_CG_SUPPORT_GFX_CGLS |
> @@ -1139,7 +1141,7 @@ static int nv_common_early_init(void *handle)
>   		}
>   		adev->external_rev_id = adev->rev_id + 0x28;
>   		break;
> -	case CHIP_NAVY_FLOUNDER:
> +	case IP_VERSION(10, 3, 2):
>   		adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG |
>   			AMD_CG_SUPPORT_GFX_CGCG |
>   			AMD_CG_SUPPORT_GFX_CGLS |
> @@ -1158,8 +1160,7 @@ static int nv_common_early_init(void *handle)
>   			AMD_PG_SUPPORT_MMHUB;
>   		adev->external_rev_id = adev->rev_id + 0x32;
>   		break;
> -
> -	case CHIP_VANGOGH:
> +	case IP_VERSION(10, 3, 1):
>   		adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG |
>   			AMD_CG_SUPPORT_GFX_MGLS |
>   			AMD_CG_SUPPORT_GFX_CP_LS |
> @@ -1182,7 +1183,7 @@ static int nv_common_early_init(void *handle)
>   		if (adev->apu_flags & AMD_APU_IS_VANGOGH)
>   			adev->external_rev_id = adev->rev_id + 0x01;
>   		break;
> -	case CHIP_DIMGREY_CAVEFISH:
> +	case IP_VERSION(10, 3, 4):
>   		adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG |
>   			AMD_CG_SUPPORT_GFX_CGCG |
>   			AMD_CG_SUPPORT_GFX_CGLS |
> @@ -1201,7 +1202,7 @@ static int nv_common_early_init(void *handle)
>   			AMD_PG_SUPPORT_MMHUB;
>   		adev->external_rev_id = adev->rev_id + 0x3c;
>   		break;
> -	case CHIP_BEIGE_GOBY:
> +	case IP_VERSION(10, 3, 5):
>   		adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG |
>   			AMD_CG_SUPPORT_GFX_CGCG |
>   			AMD_CG_SUPPORT_GFX_CGLS |
> @@ -1218,7 +1219,7 @@ static int nv_common_early_init(void *handle)
>   			AMD_PG_SUPPORT_MMHUB;
>   		adev->external_rev_id = adev->rev_id + 0x46;
>   		break;
> -	case CHIP_YELLOW_CARP:
> +	case IP_VERSION(10, 3, 3):
>   		adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG |
>   			AMD_CG_SUPPORT_GFX_MGLS |
>   			AMD_CG_SUPPORT_GFX_CGCG |
> @@ -1247,7 +1248,7 @@ static int nv_common_early_init(void *handle)
>   		else
>   			adev->external_rev_id = adev->rev_id + 0x01;
>   		break;
> -	case CHIP_CYAN_SKILLFISH:
> +	case IP_VERSION(10, 1, 3):
>   		adev->cg_flags = 0;
>   		adev->pg_flags = 0;
>   		adev->external_rev_id = adev->rev_id + 0x82;
> @@ -1374,14 +1375,14 @@ static int nv_common_set_clockgating_state(void *handle,
>   	if (amdgpu_sriov_vf(adev))
>   		return 0;
>   
> -	switch (adev->asic_type) {
> -	case CHIP_NAVI10:
> -	case CHIP_NAVI14:
> -	case CHIP_NAVI12:
> -	case CHIP_SIENNA_CICHLID:
> -	case CHIP_NAVY_FLOUNDER:
> -	case CHIP_DIMGREY_CAVEFISH:
> -	case CHIP_BEIGE_GOBY:
> +	switch (adev->ip_versions[NBIO_HWIP]) {
> +	case IP_VERSION(2, 3, 0):
> +	case IP_VERSION(2, 3, 1):
> +	case IP_VERSION(2, 3, 2):
> +	case IP_VERSION(3, 3, 0):
> +	case IP_VERSION(3, 3, 1):
> +	case IP_VERSION(3, 3, 2):
> +	case IP_VERSION(3, 3, 3):
>   		adev->nbio.funcs->update_medium_grain_clock_gating(adev,
>   				state == AMD_CG_STATE_GATE);
>   		adev->nbio.funcs->update_medium_grain_light_sleep(adev,