This DC patchset brings improvements in multiple areas. In summary, we
highlight:
- New firmware version
- Fix HPD problems on DCN2
- Fix generic encoder problems and null deferences
- Adjust DCN301 watermark
- Rework dynamic bpp for DCN3x
- Improve link training fallback logic
Best Regards
Siqueira
Cc: Daniel Wheeler <daniel.wheeler@xxxxxxx>
Cc: Mark Broadworth <mark.broadworth@xxxxxxx>
Anthony Koo (2):
drm/amd/display: [FW Promotion] Release 0.0.83
drm/amd/display: [FW Promotion] Release 0.0.84
Aric Cyr (2):
drm/amd/display: 3.2.153
drm/amd/display: 3.2.154
Guo, Bing (1):
drm/amd/display: Fix issue with dynamic bpp change for DCN3x
Hayden Goodfellow (1):
drm/amd/display: Fix wrong format specifier in amdgpu_dm.c
Jimmy Kizito (4):
drm/amd/display: Fix link training fallback logic
drm/amd/display: Fix concurrent dynamic encoder assignment
drm/amd/display: Fix dynamic encoder reassignment
drm/amd/display: Fix null pointer dereference for encoders
Lai, Derek (1):
drm/amd/display: Added power down on boot for DCN3
Liu, Zhan (3):
drm/amd/display: Fix DCN3 B0 DP Alt Mapping
drm/amd/display: Fix B0 USB-C DP Alt mode
drm/amd/display: DIG mapping change is causing a blocker
Meenakshikumar Somasundaram (1):
drm/amd/display: Creating a fw boot options bit for an upcoming
feature
Michael Strauss (1):
drm/amd/display: Disable mem low power for CM HW block on DCN3.1
Nikola Cornij (1):
drm/amd/display: Use adjusted DCN301 watermarks
Qingqing Zhuo (1):
drm/amd/display: Extend w/a for hard hang on HPD to dcn20
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
.../display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c | 12 +-
.../display/dc/clk_mgr/dcn301/vg_clk_mgr.c | 4 +-
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 17 +-
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 39 +-
.../drm/amd/display/dc/core/dc_link_enc_cfg.c | 461 ++++++++++++++----
.../drm/amd/display/dc/core/dc_link_hwss.c | 35 +-
.../gpu/drm/amd/display/dc/core/dc_resource.c | 17 +-
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
.../display/dc/dce110/dce110_hw_sequencer.c | 2 +-
.../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 2 +-
.../amd/display/dc/dcn10/dcn10_link_encoder.h | 1 +
.../drm/amd/display/dc/dcn20/dcn20_hwseq.c | 4 +-
.../drm/amd/display/dc/dcn20/dcn20_resource.c | 5 +-
.../display/dc/dcn20/dcn20_stream_encoder.c | 3 +-
.../dc/dcn30/dcn30_dio_stream_encoder.c | 18 +-
.../gpu/drm/amd/display/dc/dcn30/dcn30_optc.c | 17 +-
.../gpu/drm/amd/display/dc/dcn30/dcn30_vpg.c | 198 +++++---
.../gpu/drm/amd/display/dc/dcn30/dcn30_vpg.h | 6 +-
.../amd/display/dc/dcn301/dcn301_resource.c | 96 +++-
.../display/dc/dcn31/dcn31_dio_link_encoder.c | 39 +-
.../display/dc/dcn31/dcn31_dio_link_encoder.h | 11 +-
.../dc/dcn31/dcn31_hpo_dp_stream_encoder.c | 15 +-
.../drm/amd/display/dc/dcn31/dcn31_hwseq.c | 4 +
.../gpu/drm/amd/display/dc/dcn31/dcn31_init.c | 2 +
.../drm/amd/display/dc/dcn31/dcn31_resource.c | 2 +-
.../gpu/drm/amd/display/dc/inc/core_types.h | 18 +-
.../gpu/drm/amd/display/dc/inc/dc_link_dp.h | 2 +-
.../drm/amd/display/dc/inc/hw/link_encoder.h | 6 +
.../amd/display/dc/inc/hw/stream_encoder.h | 6 +-
.../gpu/drm/amd/display/dc/inc/link_enc_cfg.h | 23 +-
.../display/dc/irq/dcn20/irq_service_dcn20.c | 25 +
.../display/dc/irq/dcn20/irq_service_dcn20.h | 2 +
.../dc/virtual/virtual_stream_encoder.c | 3 +-
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 7 +-
.../include/asic_reg/dpcs/dpcs_4_2_0_offset.h | 27 +
36 files changed, 878 insertions(+), 255 deletions(-)
--
2.25.1
