From: Michael Strauss <michael.strauss@xxxxxxx>
[WHY]
Sequences to handle powering down these sub-IP blocks are now ready for use
Reviewed-by: Eric Yang <eric.yang2@xxxxxxx>
Acked-by: Mikita Lipski <mikita.lipski@xxxxxxx>
Signed-off-by: Michael Strauss <michael.strauss@xxxxxxx>
---
.../drm/amd/display/dc/dcn31/dcn31_resource.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
index cf6392eadaf2..613d34bde7dd 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
@@ -1009,15 +1009,15 @@ static const struct dc_debug_options debug_defaults_drv = {
.use_max_lb = true,
.enable_mem_low_power = {
.bits = {
- .vga = false,
- .i2c = false,
+ .vga = true,
+ .i2c = true,
.dmcu = false, // This is previously known to cause hang on S3 cycles if enabled
- .dscl = false,
- .cm = false,
- .mpc = false,
- .optc = false,
- .vpg = false,
- .afmt = false,
+ .dscl = true,
+ .cm = true,
+ .mpc = true,
+ .optc = true,
+ .vpg = true,
+ .afmt = true,
}
},
.optimize_edp_link_rate = true,
--
2.25.1
