Re: [PATCH 1/4] drm/amd/display: Update number of DCN3 clock states

Aurabindo Pillai <aurabindo.pillai@xxxxxxx> · Thu, 26 Aug 2021 09:34:48 -0400

Bug info added and applied, thanks!

On 8/25/21 10:00 PM, Alex Deucher wrote:
On Wed, Aug 25, 2021 at 9:10 PM Aurabindo Pillai
<aurabindo.pillai@xxxxxxx> wrote:

[Why & How]
The DCN3 SoC parameter num_states was calculated but not saved into the
object.

Signed-off-by: Aurabindo Pillai <aurabindo.pillai@xxxxxxx>
Cc: stable@xxxxxxxxxxxxxxx

Please add:
Bug: https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.freedesktop.org%2Fdrm%2Famd%2F-%2Fissues%2F1403&amp;data=04%7C01%7Caurabindo.pillai%40amd.com%7C13083d4cd17f491b251608d968355aa9%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637655400644887757%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=5OBOO0C%2FszESMd5QEjmRKKRsOM4KiMKFNWz6IdLOipM%3D&amp;reserved=0
to the series.  With that fixed, series is:
Acked-by: Alex Deucher <alexander.deucher@xxxxxxx>zz

---
  drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c | 1 +
  1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
index 1333f0541f1b..43ac6f42dd80 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
@@ -2467,6 +2467,7 @@ void dcn30_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params
                         dram_speed_mts[num_states++] = bw_params->clk_table.entries[j++].memclk_mhz * 16;
                 }

+               dcn3_0_soc.num_states = num_states;
                 for (i = 0; i < dcn3_0_soc.num_states; i++) {
                         dcn3_0_soc.clock_limits[i].state = i;
                         dcn3_0_soc.clock_limits[i].dcfclk_mhz = dcfclk_mhz[i];
--
2.30.2







