[Public] Hi all, This week this patchset was tested on the following systems: HP Envy 360, with Ryzen 5 4500U, with the following display types: eDP 1080p 60hz, 4k 60hz (via USB-C to DP/HDMI), 1440p 144hz (via USB-C to DP/HDMI), 1680*1050 60hz (via USB-C to DP and then DP to DVI/VGA) AMD Ryzen 9 5900H, with the following display types: eDP 1080p 60hz, 4k 60hz (via USB-C to DP/HDMI), 1440p 144hz (via USB-C to DP/HDMI), 1680*1050 60hz (via USB-C to DP and then DP to DVI/VGA) Sapphire Pulse RX5700XT with the following display types: 4k 60hz (via DP/HDMI), 1440p 144hz (via DP/HDMI), 1680*1050 60hz (via DP to DVI/VGA) Reference AMD RX6800 with the following display types: 4k 60hz (via DP/HDMI and USB-C to DP/HDMI), 1440p 144hz (via USB-C to DP/HDMI and USB-C to DP/HDMI), 1680*1050 60hz (via DP to DVI/VGA) Included testing using a Startech DP 1.4 MST hub at 2x 4k 60hz, and 3x 1080p 60hz on all systems. Tested-by: Daniel Wheeler <daniel.wheeler@xxxxxxx> Thank you, Dan Wheeler Technologist | AMD SW Display ------------------------------------------------------------------------------------------------------------------ 1 Commerce Valley Dr E, Thornhill, ON L3T 7X6 Facebook | Twitter | amd.com -----Original Message----- From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Solomon Chiu Sent: July 23, 2021 11:50 PM To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx Cc: Chiu, Solomon <Solomon.Chiu@xxxxxxx>; Li, Sun peng (Leo) <Sunpeng.Li@xxxxxxx>; Wentland, Harry <Harry.Wentland@xxxxxxx>; Zhuo, Qingqing <Qingqing.Zhuo@xxxxxxx>; Siqueira, Rodrigo <Rodrigo.Siqueira@xxxxxxx>; Jacob, Anson <Anson.Jacob@xxxxxxx>; Pillai, Aurabindo <Aurabindo.Pillai@xxxxxxx>; Lakha, Bhawanpreet <Bhawanpreet.Lakha@xxxxxxx>; R, Bindu <Bindu.R@xxxxxxx> Subject: [PATCH 00/14] DC Patches July 26, 2021 This DC patchset brings improvements in multiple areas. In summary, we highlight: * Guard DST_Y_PREFETCH register overflow in DCN21 * Add missing DCN21 IP parameter * Fix PSR command version * Add ETW logging for AUX failures * Add ETW log to dmub_psr_get_state * Fixed EdidUtility build errors * Fix missing reg offset for the dmcub test debug registers * Adding update authentication interface * Remove unused functions of opm state query support * Always wait for update lock status * Refactor riommu invalidation wa * Ensure dentist display clock update finished in DCN20 Anthony Koo (1): drm/amd/display: [FW Promotion] Release 0.0.76 Aric Cyr (1): drm/amd/display: 3.2.146 Dale Zhao (1): drm/amd/display: ensure dentist display clock update finished in DCN20 Eric Bernstein (1): drm/amd/display: Always wait for update lock status Eric Yang (2): drm/amd/display: fix missing reg offset drm/amd/display: refactor riommu invalidation wa Mark Morra (1): drm/amd/display: Fixed EdidUtility build errors Mikita Lipski (1): drm/amd/display: Fix PSR command version Victor Lu (2): drm/amd/display: Guard DST_Y_PREFETCH register overflow in DCN21 drm/amd/display: Add missing DCN21 IP parameter Wenjing Liu (2): drm/amd/display: add update authentication interface drm/amd/display: remove unused functions Wyatt Wood (2): drm/amd/display: Add ETW logging for AUX failures drm/amd/display: Add ETW log to dmub_psr_get_state .../amd/display/amdgpu_dm/amdgpu_dm_hdcp.c | 4 +- .../display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c | 2 +- drivers/gpu/drm/amd/display/dc/core/dc_link.c | 108 +++-- drivers/gpu/drm/amd/display/dc/dc.h | 120 +++--- drivers/gpu/drm/amd/display/dc/dc_types.h | 81 ++-- drivers/gpu/drm/amd/display/dc/dce/dce_aux.c | 8 + drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c | 21 +- .../drm/amd/display/dc/dcn20/dcn20_hwseq.c | 6 - .../drm/amd/display/dc/dcn21/dcn21_resource.c | 1 + .../gpu/drm/amd/display/dc/dcn30/dcn30_optc.c | 8 +- .../drm/amd/display/dc/dcn31/dcn31_hubbub.c | 48 ++- .../drm/amd/display/dc/dcn31/dcn31_hwseq.c | 17 - .../gpu/drm/amd/display/dc/dcn31/dcn31_init.c | 2 +- .../drm/amd/display/dc/dcn31/dcn31_resource.c | 1 - .../dc/dml/dcn21/display_mode_vba_21.c | 3 + drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c | 393 ++++++++++-------- .../gpu/drm/amd/display/dc/inc/hw/dchubbub.h | 3 - .../amd/display/dc/inc/hw_sequencer_private.h | 1 - .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 4 +- .../gpu/drm/amd/display/dmub/src/dmub_dcn31.c | 5 +- .../gpu/drm/amd/display/modules/hdcp/hdcp.c | 70 +++- .../gpu/drm/amd/display/modules/hdcp/hdcp.h | 2 - .../display/modules/hdcp/hdcp1_execution.c | 6 - .../display/modules/hdcp/hdcp2_execution.c | 3 - .../drm/amd/display/modules/hdcp/hdcp_psp.c | 53 +-- .../drm/amd/display/modules/inc/mod_hdcp.h | 12 +- 26 files changed, 538 insertions(+), 444 deletions(-) -- 2.25.1 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=04%7C01%7Cdaniel.wheeler%40amd.com%7Cfcb862bed28a483465e208d94e562fa6%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637626954357632293%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=zIUbuLeeHgoQor4tdnO%2FK7IcHZrKgmE2VZqG4NhweJc%3D&reserved=0 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx
