Am 15.07.21 um 11:29 schrieb Lazar, Lijo:
On 7/15/2021 2:56 PM, Christian König wrote:
Am 15.07.21 um 10:24 schrieb Kevin Wang:
using exiting function to replace duplicate code blocks in
amdgpu_ttm_vram_write().
NAK, this should intentionally only use the MM path and not the aper
path.
What about platform configs which don't support HDP?
Good question, I have no idea.
As far as I know the write interface here intentionally uses the
MM_INDEX/MM_DATA to bypass the HDP cache.
Regards,
Christian.
Thanks,
Lijo
But you could use amdgpu_device_mm_access() here now.
Christian.
Signed-off-by: Kevin Wang <kevin1.wang@xxxxxxx>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 7 +------
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 2aa2eb5de37a..2c98e4345ad3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -2207,7 +2207,6 @@ static ssize_t amdgpu_ttm_vram_write(struct
file *f, const char __user *buf,
return -ENXIO;
while (size) {
- unsigned long flags;
uint32_t value;
if (*pos >= adev->gmc.mc_vram_size)
@@ -2217,11 +2216,7 @@ static ssize_t amdgpu_ttm_vram_write(struct
file *f, const char __user *buf,
if (r)
return r;
- spin_lock_irqsave(&adev->mmio_idx_lock, flags);
- WREG32_NO_KIQ(mmMM_INDEX, ((uint32_t)*pos) | 0x80000000);
- WREG32_NO_KIQ(mmMM_INDEX_HI, *pos >> 31);
- WREG32_NO_KIQ(mmMM_DATA, value);
- spin_unlock_irqrestore(&adev->mmio_idx_lock, flags);
+ amdgpu_device_vram_access(adev, *pos, &value, 4, true);
result += 4;
buf += 4;
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