[AMD Official Use Only]
Hi Alex
The function amdgpu_restore_msix is used for reset the msix during board reset(sriov reset or asic reset), it moves from host to guest, so I think a flag to indicate if msix enabled is not needed.
----------------------------------------------------------------------
BW
Pengju Zhou
> -----Original Message-----
> From: Alex Deucher <alexdeucher@xxxxxxxxx>
> Sent: Tuesday, June 29, 2021 10:28 PM
> To: Zhou, Peng Ju <PengJu.Zhou@xxxxxxx>
> Cc: amd-gfx list <amd-gfx@xxxxxxxxxxxxxxxxxxxxx>; Deng, Emily
> <Emily.Deng@xxxxxxx>
> Subject: Re: [PATCH v3] drm/amdgpu: Restore msix after FLR
>
> On Fri, Jun 25, 2021 at 2:44 AM Peng Ju Zhou <PengJu.Zhou@xxxxxxx> wrote:
> >
> > From: "Emily.Deng" <Emily.Deng@xxxxxxx>
> >
> > After FLR, the msix will be cleared, so need to re-enable it.
>
> Do we need to store whether we enabled msix in the first place and then
> decide whether to enable it again in this case?
>
> Alex
>
> >
> > Signed-off-by: Emily.Deng <Emily.Deng@xxxxxxx>
> > Signed-off-by: Peng Ju Zhou <PengJu.Zhou@xxxxxxx>
> > ---
> > drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 11 +++++++++++
> > 1 file changed, 11 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> > b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> > index 90f50561b43a..26e63cb5d8d5 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> > @@ -277,6 +277,16 @@ static bool amdgpu_msi_ok(struct amdgpu_device
> *adev)
> > return true;
> > }
> >
> > +void amdgpu_restore_msix(struct amdgpu_device *adev) {
> > + u16 ctrl;
> > +
> > + pci_read_config_word(adev->pdev, adev->pdev->msix_cap +
> PCI_MSIX_FLAGS, &ctrl);
> > + ctrl &= ~PCI_MSIX_FLAGS_ENABLE;
> > + pci_write_config_word(adev->pdev, adev->pdev->msix_cap +
> PCI_MSIX_FLAGS, ctrl);
> > + ctrl |= PCI_MSIX_FLAGS_ENABLE;
> > + pci_write_config_word(adev->pdev, adev->pdev->msix_cap +
> > +PCI_MSIX_FLAGS, ctrl); }
> > /**
> > * amdgpu_irq_init - initialize interrupt handling
> > *
> > @@ -558,6 +568,7 @@ void amdgpu_irq_gpu_reset_resume_helper(struct
> > amdgpu_device *adev) {
> > int i, j, k;
> >
> > + amdgpu_restore_msix(adev);
> > for (i = 0; i < AMDGPU_IRQ_CLIENTID_MAX; ++i) {
> > if (!adev->irq.client[i].sources)
> > continue;
> > --
> > 2.17.1
> >
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