I2C fixes from various people. Some RAS touch-ups too. A rebased tree can also be found here: https://gitlab.freedesktop.org/ltuikov/linux/-/commits/i2c-rework-luben Tested on Vega20 and Sienna Cichlid. This first revision includes acks, squashes patch 33 by absolving it into earlier commits it fixes, and includes a new patch, patch 40 to deal with driver aborts seen on large writes to an I2C EEPROM device. The second revision includes more Ack and R-B tags, and also includes a break up of revision 1 patch number 36, into 4 patches, in order to better show amdgpu_ras_eeprom.c rewrite. Regards, Luben Aaron Rice (1): drm/amdgpu: rework smu11 i2c for generic operation Alex Deucher (10): drm/amdgpu: add a mutex for the smu11 i2c bus (v2) drm/amdgpu/pm: rework i2c xfers on sienna cichlid (v4) drm/amdgpu/pm: rework i2c xfers on arcturus (v4) drm/amdgpu/pm: add smu i2c implementation for navi1x (v4) drm/amdgpu: add new helper for handling EEPROM i2c transfers drm/amdgpu/ras: switch ras eeprom handling to use generic helper drm/amdgpu/ras: switch fru eeprom handling to use generic helper (v2) drm/amdgpu: i2c subsystem uses 7 bit addresses drm/amdgpu: add I2C_CLASS_HWMON to SMU i2c buses drm/amdgpu: only set restart on first cmd of the smu i2c transaction Andrey Grodzovsky (6): drm/amdgpu: Remember to wait 10ms for write buffer flush v2 dmr/amdgpu: Add RESTART handling also to smu_v11_0_i2c (VG20) drm/amdgpu: Drop i > 0 restriction for issuing RESTART drm/amdgpu: Send STOP for the last byte of msg only drm/amd/pm: SMU I2C: Return number of messages processed drm/amdgpu/pm: ADD I2C quirk adapter table Luben Tuikov (26): drm/amdgpu: Fix Vega20 I2C to be agnostic (v2) drm/amdgpu: Fixes to the AMDGPU EEPROM driver drm/amdgpu: EEPROM respects I2C quirks drm/amdgpu: I2C EEPROM full memory addressing drm/amdgpu: RAS and FRU now use 19-bit I2C address drm/amdgpu: Fix wrap-around bugs in RAS drm/amdgpu: I2C class is HWMON drm/amdgpu: RAS: EEPROM --> RAS drm/amdgpu: Rename misspelled function drm/amdgpu: RAS xfer to read/write drm/amdgpu: EEPROM: add explicit read and write drm/amd/pm: Extend the I2C quirk table drm/amd/pm: Simplify managed I2C transfer functions drm/amdgpu: Fix width of I2C address drm/amdgpu: Return result fix in RAS drm/amdgpu: Fix amdgpu_ras_eeprom_init() drm/amdgpu: Simplify RAS EEPROM checksum calculations drm/amdgpu: Use explicit cardinality for clarity drm/amdgpu: Nerf buff drm/amdgpu: Some renames drm/amdgpu: Get rid of test function drm/amdgpu: Optimize EEPROM RAS table I/O drm/amdgpu: RAS EEPROM table is now in debugfs drm/amdgpu: Fix koops when accessing RAS EEPROM drm/amdgpu: Use a single loop drm/amdgpu: Correctly disable the I2C IP block drivers/gpu/drm/amd/amdgpu/Makefile | 3 +- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 9 +- drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.c | 239 ++++ drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.h | 37 + .../gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c | 32 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 116 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 1 + .../gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c | 1253 +++++++++++------ .../gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.h | 70 +- drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c | 2 +- drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c | 319 +++-- drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h | 1 + .../gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c | 238 +--- .../gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 118 ++ .../amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 241 +--- 15 files changed, 1685 insertions(+), 994 deletions(-) create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.c create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.h Cc: Alexander Deucher <Alexander.Deucher@xxxxxxx> Cc: Andrey Grodzovsky <Andrey.Grodzovsky@xxxxxxx> Cc: Guchun Chen <guchun.chen@xxxxxxx> Cc: Hawking Zhang <Hawking.Zhang@xxxxxxx> Cc: Jean Delvare <jdelvare@xxxxxxx> Cc: John Clements <john.clements@xxxxxxx> Cc: Lijo Lazar <Lijo.Lazar@xxxxxxx> Cc: Stanley Yang <Stanley.Yang@xxxxxxx> Cc: Xinhui Pan <xinhui.pan@xxxxxxx> base-commit: 5d880fc07b8caaf734a066af61aef8d8c84da04c -- 2.32.0 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx