Probably a rebase leftover. This doesn't apply to SR-IOV, and
the non-SR-IOV code below it already handles this properly.
Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
---
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 5 -----
1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
index 4c36fc5c9738..ea6487ca997a 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
@@ -93,11 +93,6 @@ static int vcn_v3_0_early_init(void *handle)
adev->vcn.harvest_config = 0;
adev->vcn.num_enc_rings = 1;
- if (adev->asic_type == CHIP_BEIGE_GOBY) {
- adev->vcn.num_vcn_inst = 1;
- adev->vcn.num_enc_rings = 0;
- }
-
} else {
if (adev->asic_type == CHIP_SIENNA_CICHLID) {
u32 harvest;
--
2.31.1
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