Re: [PATCH 32/40] drm/amdgpu: Return result fix in RAS

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On Tue, Jun 8, 2021 at 5:41 PM Luben Tuikov <luben.tuikov@xxxxxxx> wrote:
>
> The low level EEPROM write method, doesn't return
> 1, but the number of bytes written. Thus do not
> compare to 1, instead, compare to greater than 0
> for success.
>
> Other cleanup: if the lower layers returned
> -errno, then return that, as opposed to
> overwriting the error code with one-fits-all
> -EINVAL. For instance, some return -EAGAIN.
>
> Cc: Jean Delvare <jdelvare@xxxxxxx>
> Cc: Alexander Deucher <Alexander.Deucher@xxxxxxx>
> Cc: Andrey Grodzovsky <Andrey.Grodzovsky@xxxxxxx>
> Cc: Lijo Lazar <Lijo.Lazar@xxxxxxx>
> Cc: Stanley Yang <Stanley.Yang@xxxxxxx>
> Cc: Hawking Zhang <Hawking.Zhang@xxxxxxx>
> Signed-off-by: Luben Tuikov <luben.tuikov@xxxxxxx>

Reviewed-by: Alex Deucher <alexander.deucher@xxxxxxx>

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.c    |  3 +--
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c       | 22 +++++++++++--------
>  .../gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c    |  2 +-
>  drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c    |  3 +--
>  4 files changed, 16 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.c
> index a5a87affedabf1..a4815af111ed12 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.c
> @@ -105,8 +105,7 @@ static int __amdgpu_eeprom_xfer(struct i2c_adapter *i2c_adap, u32 eeprom_addr,
>         int r;
>         u16 len;
>
> -       r = 0;
> -       for ( ; buf_size > 0;
> +       for (r = 0; buf_size > 0;
>               buf_size -= len, eeprom_addr += len, eeprom_buf += len) {
>                 /* Set the EEPROM address we want to write to/read from.
>                  */
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> index e3ad081eddd40b..66c96c65e7eeb9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> @@ -355,8 +355,9 @@ static int amdgpu_ras_debugfs_ctrl_parse_data(struct file *f,
>   *     to see which blocks support RAS on a particular asic.
>   *
>   */
> -static ssize_t amdgpu_ras_debugfs_ctrl_write(struct file *f, const char __user *buf,
> -               size_t size, loff_t *pos)
> +static ssize_t amdgpu_ras_debugfs_ctrl_write(struct file *f,
> +                                            const char __user *buf,
> +                                            size_t size, loff_t *pos)
>  {
>         struct amdgpu_device *adev = (struct amdgpu_device *)file_inode(f)->i_private;
>         struct ras_debug_if data;
> @@ -370,7 +371,7 @@ static ssize_t amdgpu_ras_debugfs_ctrl_write(struct file *f, const char __user *
>
>         ret = amdgpu_ras_debugfs_ctrl_parse_data(f, buf, size, pos, &data);
>         if (ret)
> -               return -EINVAL;
> +               return ret;
>
>         if (data.op == 3) {
>                 ret = amdgpu_reserve_page_direct(adev, data.inject.address);
> @@ -439,21 +440,24 @@ static ssize_t amdgpu_ras_debugfs_ctrl_write(struct file *f, const char __user *
>   * will reset EEPROM table to 0 entries.
>   *
>   */
> -static ssize_t amdgpu_ras_debugfs_eeprom_write(struct file *f, const char __user *buf,
> -               size_t size, loff_t *pos)
> +static ssize_t amdgpu_ras_debugfs_eeprom_write(struct file *f,
> +                                              const char __user *buf,
> +                                              size_t size, loff_t *pos)
>  {
>         struct amdgpu_device *adev =
>                 (struct amdgpu_device *)file_inode(f)->i_private;
>         int ret;
>
>         ret = amdgpu_ras_eeprom_reset_table(
> -                       &(amdgpu_ras_get_context(adev)->eeprom_control));
> +               &(amdgpu_ras_get_context(adev)->eeprom_control));
>
> -       if (ret == 1) {
> +       if (ret > 0) {
> +               /* Something was written to EEPROM.
> +                */
>                 amdgpu_ras_get_context(adev)->flags = RAS_DEFAULT_FLAGS;
>                 return size;
>         } else {
> -               return -EIO;
> +               return ret;
>         }
>  }
>
> @@ -1991,7 +1995,7 @@ int amdgpu_ras_recovery_init(struct amdgpu_device *adev)
>         kfree(*data);
>         con->eh_data = NULL;
>  out:
> -       dev_warn(adev->dev, "Failed to initialize ras recovery!\n");
> +       dev_warn(adev->dev, "Failed to initialize ras recovery! (%d)\n", ret);
>
>         /*
>          * Except error threshold exceeding case, other failure cases in this
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
> index 17cea35275e46c..dc48c556398039 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
> @@ -335,7 +335,7 @@ int amdgpu_ras_eeprom_init(struct amdgpu_ras_eeprom_control *control,
>                 ret = amdgpu_ras_eeprom_reset_table(control);
>         }
>
> -       return ret == 1 ? 0 : -EIO;
> +       return ret > 0 ? 0 : -EIO;
>  }
>
>  static void __encode_table_record_to_buff(struct amdgpu_ras_eeprom_control *control,
> diff --git a/drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c b/drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c
> index 65035256756679..7f48ee020bc03e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c
> +++ b/drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c
> @@ -222,7 +222,7 @@ static uint32_t smu_v11_0_i2c_transmit(struct i2c_adapter *control,
>                                        u32 numbytes, u32 i2c_flag)
>  {
>         struct amdgpu_device *adev = to_amdgpu_device(control);
> -       uint32_t bytes_sent, reg, ret = 0;
> +       u32 bytes_sent, reg, ret = I2C_OK;
>         unsigned long  timeout_counter;
>
>         bytes_sent = 0;
> @@ -290,7 +290,6 @@ static uint32_t smu_v11_0_i2c_transmit(struct i2c_adapter *control,
>         }
>
>         ret = smu_v11_0_i2c_poll_tx_status(control);
> -
>  Err:
>         /* Any error, no point in proceeding */
>         if (ret != I2C_OK) {
> --
> 2.32.0
>
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