That's fair, I wasn't sure if adding a lookup table for the bitmapping of each ASIC was necessarily wanted, but it would definitely result in less runtime overhead.
This way we can also make use of the for_each_set_bit() macro in bitops.h. I'll make the change and fix the padding and resubmit. Thanks for the feedback.
Graham
-----Original Message-----
From: Lazar, Lijo <Lijo.Lazar@xxxxxxx>
Sent: Monday, May 31, 2021 1:13 AM
To: Sider, Graham <Graham.Sider@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Kasiviswanathan, Harish <Harish.Kasiviswanathan@xxxxxxx>; Sider, Graham <Graham.Sider@xxxxxxx>; Sakhnovitch, Elena (Elen) <Elena.Sakhnovitch@xxxxxxx>
Subject: RE: [PATCH v2 4/8] drm/amd/pm: Add navi1x throttler translation
[AMD Official Use Only]
-----Original Message-----
From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Graham Sider
Sent: Saturday, May 29, 2021 1:28 AM
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Kasiviswanathan, Harish <Harish.Kasiviswanathan@xxxxxxx>; Sider, Graham <Graham.Sider@xxxxxxx>; Sakhnovitch, Elena (Elen) <Elena.Sakhnovitch@xxxxxxx>
Subject: [PATCH v2 4/8] drm/amd/pm: Add navi1x throttler translation
Perform dependent to independent throttle status translation for navi1x.
Signed-off-by: Graham Sider <Graham.Sider@xxxxxxx>
---
.../gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 56 +++++++++++++++++++
1 file changed, 56 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index 78fe13183e8b..878ec698909c 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -524,6 +524,54 @@ static int navi10_tables_init(struct smu_context *smu)
return -ENOMEM;
}
+static uint64_t navi1x_get_indep_throttler_status(
+ uint32_t dep_status)
+{
+ if (dep_status == 0)
+ return 0;
+
+ uint64_t indep_status = 0;
< > Extending Harish's comments - it's very unlikely that all or even 50% of these bits are set together. It may be better to do something like
while (bit=ffs(dep_status)) {
indep_status |= 1ULL << mapping[bit-1]; dep_status &= ~(1UL << bit - 1); } Will need a lookup table, should be fine though.
Thanks,
Lijo
+ indep_status |= smu_u64_throttler_bit(dep_status,
+ SMU_THROTTLER_TEMP_EDGE_BIT, THROTTLER_TEMP_EDGE_BIT);
+ indep_status |= smu_u64_throttler_bit(dep_status,
+ SMU_THROTTLER_TEMP_HOTSPOT_BIT, THROTTLER_TEMP_HOTSPOT_BIT);
+ indep_status |= smu_u64_throttler_bit(dep_status,
+ SMU_THROTTLER_TEMP_MEM_BIT, THROTTLER_TEMP_MEM_BIT);
+ indep_status |= smu_u64_throttler_bit(dep_status,
+ SMU_THROTTLER_TEMP_VR_GFX_BIT, THROTTLER_TEMP_VR_GFX_BIT);
+ indep_status |= smu_u64_throttler_bit(dep_status,
+ SMU_THROTTLER_TEMP_VR_MEM_BIT, THROTTLER_TEMP_VR_MEM0_BIT);
+ indep_status |= smu_u64_throttler_bit(dep_status,
+ SMU_THROTTLER_TEMP_VR_MEM_BIT, THROTTLER_TEMP_VR_MEM1_BIT);
+ indep_status |= smu_u64_throttler_bit(dep_status,
+ SMU_THROTTLER_TEMP_VR_SOC_BIT, THROTTLER_TEMP_VR_SOC_BIT);
+ indep_status |= smu_u64_throttler_bit(dep_status,
+ SMU_THROTTLER_TEMP_LIQUID_BIT, THROTTLER_TEMP_LIQUID0_BIT);
+ indep_status |= smu_u64_throttler_bit(dep_status,
+ SMU_THROTTLER_TEMP_LIQUID_BIT, THROTTLER_TEMP_LIQUID1_BIT);
+ indep_status |= smu_u64_throttler_bit(dep_status,
+ SMU_THROTTLER_TDC_GFX_BIT, THROTTLER_TDC_GFX_BIT);
+ indep_status |= smu_u64_throttler_bit(dep_status,
+ SMU_THROTTLER_TDC_SOC_BIT, THROTTLER_TDC_SOC_BIT);
+ indep_status |= smu_u64_throttler_bit(dep_status,
+ SMU_THROTTLER_PPT0_BIT, THROTTLER_PPT0_BIT);
+ indep_status |= smu_u64_throttler_bit(dep_status,
+ SMU_THROTTLER_PPT1_BIT, THROTTLER_PPT1_BIT);
+ indep_status |= smu_u64_throttler_bit(dep_status,
+ SMU_THROTTLER_PPT2_BIT, THROTTLER_PPT2_BIT);
+ indep_status |= smu_u64_throttler_bit(dep_status,
+ SMU_THROTTLER_PPT3_BIT, THROTTLER_PPT3_BIT);
+ indep_status |= smu_u64_throttler_bit(dep_status,
+ SMU_THROTTLER_FIT_BIT, THROTTLER_FIT_BIT);
+ indep_status |= smu_u64_throttler_bit(dep_status,
+ SMU_THROTTLER_PPM_BIT, THROTTLER_PPM_BIT);
+ indep_status |= smu_u64_throttler_bit(dep_status,
+ SMU_THROTTLER_APCC_BIT, THROTTLER_APCC_BIT);
+
+ return indep_status;
+}
+
static int navi10_get_legacy_smu_metrics_data(struct smu_context *smu,
MetricsMember_t member,
uint32_t *value)
@@ -2673,6 +2721,8 @@ static ssize_t navi10_get_legacy_gpu_metrics(struct smu_context *smu,
gpu_metrics->current_dclk0 = metrics.CurrClock[PPCLK_DCLK];
gpu_metrics->throttle_status = metrics.ThrottlerStatus;
+ gpu_metrics->indep_throttle_status =
+ navi1x_get_indep_throttler_status(metrics.ThrottlerStatus);
gpu_metrics->current_fan_speed = metrics.CurrFanSpeed;
@@ -2750,6 +2800,8 @@ static ssize_t navi10_get_gpu_metrics(struct smu_context *smu,
gpu_metrics->current_dclk0 = metrics.CurrClock[PPCLK_DCLK];
gpu_metrics->throttle_status = metrics.ThrottlerStatus;
+ gpu_metrics->indep_throttle_status =
+ navi1x_get_indep_throttler_status(metrics.ThrottlerStatus);
gpu_metrics->current_fan_speed = metrics.CurrFanSpeed;
@@ -2826,6 +2878,8 @@ static ssize_t navi12_get_legacy_gpu_metrics(struct smu_context *smu,
gpu_metrics->current_dclk0 = metrics.CurrClock[PPCLK_DCLK];
gpu_metrics->throttle_status = metrics.ThrottlerStatus;
+ gpu_metrics->indep_throttle_status =
+ navi1x_get_indep_throttler_status(metrics.ThrottlerStatus);
gpu_metrics->current_fan_speed = metrics.CurrFanSpeed;
@@ -2908,6 +2962,8 @@ static ssize_t navi12_get_gpu_metrics(struct smu_context *smu,
gpu_metrics->current_dclk0 = metrics.CurrClock[PPCLK_DCLK];
gpu_metrics->throttle_status = metrics.ThrottlerStatus;
+ gpu_metrics->indep_throttle_status =
+ navi1x_get_indep_throttler_status(metrics.ThrottlerStatus);
gpu_metrics->current_fan_speed = metrics.CurrFanSpeed;
--
2.17.1
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