On Wed, May 26, 2021 at 4:06 AM Xiaojian Du <Xiaojian.Du@xxxxxxx> wrote: > > This patch is to retain the fine grain tuning parameters after resume for > legacy APU, it will cover Raven/Raven2/Picasso. > > Signed-off-by: Xiaojian Du <Xiaojian.Du@xxxxxxx> > --- > .../amd/pm/powerplay/hwmgr/hardwaremanager.c | 3 ++- > .../drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c | 21 +++++++++++++++++++ > 2 files changed, 23 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/hardwaremanager.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/hardwaremanager.c > index 25b5831a15cd..370deae7b054 100644 > --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/hardwaremanager.c > +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/hardwaremanager.c > @@ -82,7 +82,8 @@ int phm_enable_dynamic_state_management(struct pp_hwmgr *hwmgr) > > /* Skip for suspend/resume case */ > if (!hwmgr->pp_one_vf && smum_is_dpm_running(hwmgr) > - && !amdgpu_passthrough(adev) && adev->in_suspend) { > + && !amdgpu_passthrough(adev) && adev->in_suspend > + && !adev->apu_flags) { Might be clearer to check (asic_type != CHIP_RAVEN) here rather than apu_flags. Makes it more clear what you are checking for. With that fixed, Reviewed-by: Alex Deucher <alexander.deucher@xxxxxxx> Alex > pr_info("dpm has been enabled\n"); > return 0; > } > diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c > index f5fe540cd536..8f71f6a4bb49 100644 > --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c > +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c > @@ -377,6 +377,27 @@ static int smu10_enable_gfx_off(struct pp_hwmgr *hwmgr) > > static int smu10_enable_dpm_tasks(struct pp_hwmgr *hwmgr) > { > + struct amdgpu_device *adev = hwmgr->adev; > + struct smu10_hwmgr *smu10_data = (struct smu10_hwmgr *)(hwmgr->backend); > + int ret = -EINVAL; > + > + if (adev->in_suspend) { > + pr_info("restore the fine grain parameters\n"); > + > + ret = smum_send_msg_to_smc_with_parameter(hwmgr, > + PPSMC_MSG_SetHardMinGfxClk, > + smu10_data->gfx_actual_soft_min_freq, > + NULL); > + if (ret) > + return ret; > + ret = smum_send_msg_to_smc_with_parameter(hwmgr, > + PPSMC_MSG_SetSoftMaxGfxClk, > + smu10_data->gfx_actual_soft_max_freq, > + NULL); > + if (ret) > + return ret; > + } > + > return 0; > } > > -- > 2.25.1 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx