There are duplicates in this list. It's better to classify as
Power/Temperature/Current/Others and map; maybe, allocate 16 bit each in
a 64-bit mask. Also, keep the naming consistent and start with "SMU_",
that's what we do for others like SMU messages.
Power throttlers
-----------------
#define SMU_THROTTLER_PPT1_BIT
#define SMU_THROTTLER_PPT0_BIT
#define SMU_THROTTLER_PPT2_BIT
#define SMU_THROTTLER_PPT3_BIT
#define SMU_THROTTLER_SPL_BIT
#define SMU_THROTTLER_FPPT_BIT
#define SMU_THROTTLER_SPPT_BIT
#define SMU_THROTTLER_SPPT_APU_BIT
Current Throttlers
-------------------
#define SMU_THROTTLER_TDC_GFX_BIT
#define SMU_THROTTLER_TDC_VDD_BIT
#define SMU_THROTTLER_TDC_SOC_BIT
#define SMU_THROTTLER_TDC_MEM_BIT => Should be the one used for HBM as well
#define SMU_THROTTLER_TDC_CVIP_BIT
#define SMU_THROTTLER_APCC_BIT
Temperature
------------
#define SMU_THROTTLER_TEMP_GPU_BIT
#define SMU_THROTTLER_TEMP_CORE_BIT
#define SMU_THROTTLER_TEMP_MEM_BIT
#define SMU_THROTTLER_TEMP_EDGE_BIT
#define SMU_THROTTLER_TEMP_HOTSPOT_BIT
#define SMU_THROTTLER_TEMP_VR_GFX_BIT
#define SMU_THROTTLER_TEMP_VR_SOC_BIT
#define SMU_THROTTLER_TEMP_VR_MEM_BIT
#define SMU_THROTTLER_VRHOT0_BIT
#define SMU_THROTTLER_VRHOT1_BIT
#define SMU_THROTTLER_TEMP_LIQUID_BIT
Others
-------
#define SMU_THROTTLER_PPM_BIT
#define SMU_THROTTLER_FIT_BIT
--
Thanks,
Lijo
On 5/20/2021 7:59 PM, Graham Sider wrote:
Add new defines for thermal throttle status bits which are ASIC
independent. This bit field will be visible to userspace via
gpu_metrics, replacing the previous ASIC dependent bit fields.
---
drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h | 32 +++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
index 523f9d2982e9..fbbebb1da913 100644
--- a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
@@ -35,6 +35,38 @@
#define SMU_DPM_USER_PROFILE_RESTORE (1 << 0)
+#define INDEP_THROTTLER_PPT0_BIT 0
+#define INDEP_THROTTLER_PPT1_BIT 1
+#define INDEP_THROTTLER_PPT2_BIT 2
+#define INDEP_THROTTLER_PPT3_BIT 3
+#define INDEP_THROTTLER_TDC_GFX_BIT 4
+#define INDEP_THROTTLER_TDC_SOC_BIT 5
+#define INDEP_THROTTLER_TDC_HBM_BIT 6
+#define INDEP_THROTTLER_TEMP_GPU_BIT 7
+#define INDEP_THROTTLER_TEMP_MEM_BIT 8
+#define INDEP_THROTTLER_TEMP_EDGE_BIT 9
+#define INDEP_THROTTLER_TEMP_HOTSPOT_BIT 10
+#define INDEP_THROTTLER_TEMP_VR_GFX_BIT 11
+#define INDEP_THROTTLER_TEMP_VR_SOC_BIT 12
+#define INDEP_THROTTLER_TEMP_VR_MEM_BIT 13
+#define INDEP_THROTTLER_TEMP_LIQUID_BIT 14
+#define INDEP_THROTTLER_APCC_BIT 15
+#define INDEP_THROTTLER_PPM_BIT 16
+#define INDEP_THROTTLER_FIT_BIT 17
+#define INDEP_THROTTLER_VRHOT0_BIT 18
+#define INDEP_THROTTLER_VRHOT1_BIT 19
+#define INDEP_THROTTLER_STATUS_BIT_SPL 20
+#define INDEP_THROTTLER_STATUS_BIT_FPPT 21
+#define INDEP_THROTTLER_STATUS_BIT_SPPT 22
+#define INDEP_THROTTLER_STATUS_BIT_SPPT_APU 23
+#define INDEP_THROTTLER_STATUS_BIT_THM_CORE 24
+#define INDEP_THROTTLER_STATUS_BIT_THM_GFX 25
+#define INDEP_THROTTLER_STATUS_BIT_THM_SOC 26
+#define INDEP_THROTTLER_STATUS_BIT_TDC_VDD 27
+#define INDEP_THROTTLER_STATUS_BIT_TDC_SOC 28
+#define INDEP_THROTTLER_STATUS_BIT_TDC_GFX 29
+#define INDEP_THROTTLER_STATUS_BIT_TDC_CVIP 30
+
struct smu_hw_power_state {
unsigned int magic;
};
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