Re: [PATCH] drm/amdgpu: modify system reference clock source for navi+

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From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> on behalf of Aaron Liu <aaron.liu@xxxxxxx>
Sent: Tuesday, May 18, 2021 2:26 PM
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx <amd-gfx@xxxxxxxxxxxxxxxxxxxxx>
Cc: Deucher, Alexander <Alexander.Deucher@xxxxxxx>; Huang, Ray <Ray.Huang@xxxxxxx>; Liu, Aaron <Aaron.Liu@xxxxxxx>
Subject: [PATCH] drm/amdgpu: modify system reference clock source for navi+
 
Starting from Navi+, the rlc reference clock is used for system clock
from vbios gfx_info table. It is incorrect to use core_refclk_10khz of
vbios smu_info table as system clock.

Signed-off-by: Aaron Liu <aaron.liu@xxxxxxx>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
index 8c417014ca89..83ca58426139 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
@@ -546,6 +546,21 @@ int amdgpu_atomfirmware_get_clock_info(struct amdgpu_device *adev)
                 ret = 0;
         }
 
+       /* if asic is Navi+, the rlc reference clock is used for system clock
+        * from vbios gfx_info table */
+       if (adev->asic_type >= CHIP_NAVI10) {
+               index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
+                                                  gfx_info);
+               if (amdgpu_atom_parse_data_header(mode_info->atom_context, index, NULL,
+                                         &frev, &crev, &data_offset)) {
+                       struct atom_gfx_info_v2_2 *gfx_info = (struct atom_gfx_info_v2_2*)
+                               (mode_info->atom_context->bios + data_offset);
+                       if ((frev >= 2) && (crev >= 2))
[kevin]:
There is a hidden danger here. We can't assume that the higher version (frev) is compatible with old one.
the code should change to if (frev == 2) && (crev >= 2)) {} ...

+                               spll->reference_freq = le32_to_cpu(gfx_info->rlc_gpu_timer_refclk);
+                       ret = 0;
+               }
+       }
+
         return ret;
 }
 
--
2.25.1

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