[AMD Official Use Only - Internal Distribution Only] Hi Ray and Alex, I have confirmed it can enable the additional compute queues with this patch: [ 41.823013] This is ring mec 1, pipe 0, queue 0, value 1 [ 41.823028] This is ring mec 1, pipe 1, queue 0, value 1 [ 41.823042] This is ring mec 1, pipe 2, queue 0, value 1 [ 41.823057] This is ring mec 1, pipe 3, queue 0, value 1 [ 41.823071] This is ring mec 1, pipe 0, queue 1, value 1 [ 41.823086] This is ring mec 1, pipe 1, queue 1, value 1 [ 41.823101] This is ring mec 1, pipe 2, queue 1, value 1 [ 41.823115] This is ring mec 1, pipe 3, queue 1, value 1 BR, Changfeng. -----Original Message----- From: Huang, Ray <Ray.Huang@xxxxxxx> Sent: Monday, May 17, 2021 2:27 PM To: Alex Deucher <alexdeucher@xxxxxxxxx>; Zhu, Changfeng <Changfeng.Zhu@xxxxxxx> Cc: amd-gfx list <amd-gfx@xxxxxxxxxxxxxxxxxxxxx> Subject: Re: [PATCH] drm/amdgpu: disable 3DCGCG on picasso/raven1 to avoid compute hang On Fri, May 14, 2021 at 10:13:55PM +0800, Alex Deucher wrote: > On Fri, May 14, 2021 at 4:20 AM <changfeng.zhu@xxxxxxx> wrote: > > > > From: changzhu <Changfeng.Zhu@xxxxxxx> > > > > From: Changfeng <Changfeng.Zhu@xxxxxxx> > > > > There is problem with 3DCGCG firmware and it will cause compute test > > hang on picasso/raven1. It needs to disable 3DCGCG in driver to > > avoid compute hang. > > > > Change-Id: Ic7d3c7922b2b32f7ac5193d6a4869cbc5b3baa87 > > Signed-off-by: Changfeng <Changfeng.Zhu@xxxxxxx> > > Reviewed-by: Alex Deucher <alexander.deucher@xxxxxxx> > > WIth this applied, can we re-enable the additional compute queues? > I think so. Changfeng, could you please confirm this on all raven series? Patch is Reviewed-by: Huang Rui <ray.huang@xxxxxxx> > Alex > > > --- > > drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 10 +++++++--- > > drivers/gpu/drm/amd/amdgpu/soc15.c | 2 -- > > 2 files changed, 7 insertions(+), 5 deletions(-) > > > > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c > > b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c > > index 22608c45f07c..feaa5e4a5538 100644 > > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c > > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c > > @@ -4947,7 +4947,7 @@ static void gfx_v9_0_update_3d_clock_gating(struct amdgpu_device *adev, > > amdgpu_gfx_rlc_enter_safe_mode(adev); > > > > /* Enable 3D CGCG/CGLS */ > > - if (enable && (adev->cg_flags & AMD_CG_SUPPORT_GFX_3D_CGCG)) { > > + if (enable) { > > /* write cmd to clear cgcg/cgls ov */ > > def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); > > /* unset CGCG override */ @@ -4959,8 +4959,12 @@ > > static void gfx_v9_0_update_3d_clock_gating(struct amdgpu_device *adev, > > /* enable 3Dcgcg FSM(0x0000363f) */ > > def = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D); > > > > - data = (0x36 << RLC_CGCG_CGLS_CTRL_3D__CGCG_GFX_IDLE_THRESHOLD__SHIFT) | > > - RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK; > > + if (adev->cg_flags & AMD_CG_SUPPORT_GFX_3D_CGCG) > > + data = (0x36 << RLC_CGCG_CGLS_CTRL_3D__CGCG_GFX_IDLE_THRESHOLD__SHIFT) | > > + RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK; > > + else > > + data = 0x0 << > > + RLC_CGCG_CGLS_CTRL_3D__CGCG_GFX_IDLE_THRESHOLD__SHIFT; > > + > > if (adev->cg_flags & AMD_CG_SUPPORT_GFX_3D_CGLS) > > data |= (0x000F << RLC_CGCG_CGLS_CTRL_3D__CGLS_REP_COMPANSAT_DELAY__SHIFT) | > > RLC_CGCG_CGLS_CTRL_3D__CGLS_EN_MASK; > > diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c > > b/drivers/gpu/drm/amd/amdgpu/soc15.c > > index 4b660b2d1c22..080e715799d4 100644 > > --- a/drivers/gpu/drm/amd/amdgpu/soc15.c > > +++ b/drivers/gpu/drm/amd/amdgpu/soc15.c > > @@ -1393,7 +1393,6 @@ static int soc15_common_early_init(void *handle) > > adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG | > > AMD_CG_SUPPORT_GFX_MGLS | > > AMD_CG_SUPPORT_GFX_CP_LS | > > - AMD_CG_SUPPORT_GFX_3D_CGCG | > > AMD_CG_SUPPORT_GFX_3D_CGLS | > > AMD_CG_SUPPORT_GFX_CGCG | > > AMD_CG_SUPPORT_GFX_CGLS | @@ -1413,7 > > +1412,6 @@ static int soc15_common_early_init(void *handle) > > AMD_CG_SUPPORT_GFX_MGLS | > > AMD_CG_SUPPORT_GFX_RLC_LS | > > AMD_CG_SUPPORT_GFX_CP_LS | > > - AMD_CG_SUPPORT_GFX_3D_CGCG | > > AMD_CG_SUPPORT_GFX_3D_CGLS | > > AMD_CG_SUPPORT_GFX_CGCG | > > AMD_CG_SUPPORT_GFX_CGLS | > > -- > > 2.17.1 > > > > _______________________________________________ > > amd-gfx mailing list > > amd-gfx@xxxxxxxxxxxxxxxxxxxxx > > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fli > > sts.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=04%7C01% > > 7CRay.Huang%40amd.com%7C0e273856253d4b3efd0b08d916e2892a%7C3dd8961fe > > 4884e608e11a82d994e183d%7C0%7C0%7C637565984495414849%7CUnknown%7CTWF > > pbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI > > 6Mn0%3D%7C1000&sdata=lBzswAPBguL0mWFglEk%2Bg2eDCEuhir7JfFjov%2BV > > 7pSY%3D&reserved=0 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx