[PATCH 2/2] drm/amdgpu/pm: add new fields for Navi1x

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Fill voltage and frequency ranges fields

Signed-off-by: David M Nieto <david.nieto@xxxxxxx>
Change-Id: I07f926dea46e80a96e1c972ba9dbc804b812d503
---
 .../gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c   | 434 +++++++++++++++++-
 1 file changed, 417 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index ac13042672ea..a412fa9a95ec 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -505,7 +505,7 @@ static int navi10_tables_init(struct smu_context *smu)
 		goto err0_out;
 	smu_table->metrics_time = 0;
 
-	smu_table->gpu_metrics_table_size = sizeof(struct gpu_metrics_v1_1);
+	smu_table->gpu_metrics_table_size = sizeof(struct gpu_metrics_v1_3);
 	smu_table->gpu_metrics_table = kzalloc(smu_table->gpu_metrics_table_size, GFP_KERNEL);
 	if (!smu_table->gpu_metrics_table)
 		goto err1_out;
@@ -2627,10 +2627,11 @@ static ssize_t navi10_get_legacy_gpu_metrics(struct smu_context *smu,
 					     void **table)
 {
 	struct smu_table_context *smu_table = &smu->smu_table;
-	struct gpu_metrics_v1_1 *gpu_metrics =
-		(struct gpu_metrics_v1_1 *)smu_table->gpu_metrics_table;
+	struct gpu_metrics_v1_3 *gpu_metrics =
+		(struct gpu_metrics_v1_3 *)smu_table->gpu_metrics_table;
 	SmuMetrics_legacy_t metrics;
 	int ret = 0;
+	int freq = 0, dpm = 0;
 
 	mutex_lock(&smu->metrics_lock);
 
@@ -2646,7 +2647,7 @@ static ssize_t navi10_get_legacy_gpu_metrics(struct smu_context *smu,
 
 	mutex_unlock(&smu->metrics_lock);
 
-	smu_cmn_init_soft_gpu_metrics(gpu_metrics, 1, 1);
+	smu_cmn_init_soft_gpu_metrics(gpu_metrics, 1, 3);
 
 	gpu_metrics->temperature_edge = metrics.TemperatureEdge;
 	gpu_metrics->temperature_hotspot = metrics.TemperatureHotspot;
@@ -2681,19 +2682,119 @@ static ssize_t navi10_get_legacy_gpu_metrics(struct smu_context *smu,
 
 	gpu_metrics->system_clock_counter = ktime_get_boottime_ns();
 
+	gpu_metrics->voltage_gfx = (155000 - 625 * metrics.CurrGfxVoltageOffset) / 100;
+	gpu_metrics->voltage_mem = (155000 - 625 * metrics.CurrMemVidOffset) / 100;
+	gpu_metrics->voltage_soc = (155000 - 625 * metrics.CurrSocVoltageOffset) / 100;
+
+	gpu_metrics->max_socket_power = smu->power_limit;
+
+	/* Frequency and DPM ranges */
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_GFXCLK, 0, &freq);
+	if (ret)
+		goto out;
+	gpu_metrics->min_gfxclk_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_SOCCLK, 0, &freq);
+	if (ret)
+		goto out;
+	gpu_metrics->min_socclk_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_UCLK, 0, &freq);
+	if (ret)
+		goto out;
+	gpu_metrics->min_uclk_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_VCLK, 0, &freq);
+	if (ret)
+		goto out;
+	gpu_metrics->min_vclk0_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_DCLK, 0, &freq);
+	if (ret)
+		goto out;
+	gpu_metrics->min_dclk0_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_level_count(smu, SMU_GFXCLK, &dpm);
+	if (ret)
+		goto out;
+	gpu_metrics->max_gfxclk_dpm = dpm;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_GFXCLK,
+			gpu_metrics->max_gfxclk_dpm - 1, &freq);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_gfxclk_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_level_count(smu, SMU_SOCCLK, &dpm);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_socclk_dpm = dpm;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_SOCCLK,
+			gpu_metrics->max_socclk_dpm - 1, &freq);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_socclk_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_level_count(smu, SMU_UCLK, &dpm);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_uclk_dpm = dpm;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_UCLK,
+			gpu_metrics->max_uclk_dpm - 1, &freq);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_uclk_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_level_count(smu, SMU_VCLK, &dpm);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_vclk0_dpm = dpm;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_VCLK,
+			gpu_metrics->max_vclk0_dpm - 1, &freq);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_vclk0_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_level_count(smu, SMU_DCLK, &dpm);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_dclk0_dpm = dpm;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_DCLK,
+			gpu_metrics->max_dclk0_dpm - 1, &freq);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_dclk0_frequency = freq;
+
 	*table = (void *)gpu_metrics;
 
-	return sizeof(struct gpu_metrics_v1_1);
+	return sizeof(struct gpu_metrics_v1_3);
+out:
+	return ret;
 }
 
 static ssize_t navi10_get_gpu_metrics(struct smu_context *smu,
 				      void **table)
 {
 	struct smu_table_context *smu_table = &smu->smu_table;
-	struct gpu_metrics_v1_1 *gpu_metrics =
-		(struct gpu_metrics_v1_1 *)smu_table->gpu_metrics_table;
+	struct gpu_metrics_v1_3 *gpu_metrics =
+		(struct gpu_metrics_v1_3 *)smu_table->gpu_metrics_table;
 	SmuMetrics_t metrics;
 	int ret = 0;
+	int freq = 0, dpm = 0;
 
 	mutex_lock(&smu->metrics_lock);
 
@@ -2709,7 +2810,7 @@ static ssize_t navi10_get_gpu_metrics(struct smu_context *smu,
 
 	mutex_unlock(&smu->metrics_lock);
 
-	smu_cmn_init_soft_gpu_metrics(gpu_metrics, 1, 1);
+	smu_cmn_init_soft_gpu_metrics(gpu_metrics, 1, 3);
 
 	gpu_metrics->temperature_edge = metrics.TemperatureEdge;
 	gpu_metrics->temperature_hotspot = metrics.TemperatureHotspot;
@@ -2746,19 +2847,119 @@ static ssize_t navi10_get_gpu_metrics(struct smu_context *smu,
 
 	gpu_metrics->system_clock_counter = ktime_get_boottime_ns();
 
+	gpu_metrics->voltage_gfx = (155000 - 625 * metrics.CurrGfxVoltageOffset) / 100;
+	gpu_metrics->voltage_mem = (155000 - 625 * metrics.CurrMemVidOffset) / 100;
+	gpu_metrics->voltage_soc = (155000 - 625 * metrics.CurrSocVoltageOffset) / 100;
+
+	gpu_metrics->max_socket_power = smu->power_limit;
+
+	/* Frequency and DPM ranges */
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_GFXCLK, 0, &freq);
+	if (ret)
+		goto out;
+	gpu_metrics->min_gfxclk_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_SOCCLK, 0, &freq);
+	if (ret)
+		goto out;
+	gpu_metrics->min_socclk_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_UCLK, 0, &freq);
+	if (ret)
+		goto out;
+	gpu_metrics->min_uclk_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_VCLK, 0, &freq);
+	if (ret)
+		goto out;
+	gpu_metrics->min_vclk0_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_DCLK, 0, &freq);
+	if (ret)
+		goto out;
+	gpu_metrics->min_dclk0_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_level_count(smu, SMU_GFXCLK, &dpm);
+	if (ret)
+		goto out;
+	gpu_metrics->max_gfxclk_dpm = dpm;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_GFXCLK,
+			gpu_metrics->max_gfxclk_dpm - 1, &freq);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_gfxclk_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_level_count(smu, SMU_SOCCLK, &dpm);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_socclk_dpm = dpm;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_SOCCLK,
+			gpu_metrics->max_socclk_dpm - 1, &freq);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_socclk_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_level_count(smu, SMU_UCLK, &dpm);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_uclk_dpm = dpm;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_UCLK,
+			gpu_metrics->max_uclk_dpm - 1, &freq);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_uclk_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_level_count(smu, SMU_VCLK, &dpm);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_vclk0_dpm = dpm;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_VCLK,
+			gpu_metrics->max_vclk0_dpm - 1, &freq);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_vclk0_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_level_count(smu, SMU_DCLK, &dpm);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_dclk0_dpm = dpm;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_DCLK,
+			gpu_metrics->max_dclk0_dpm - 1, &freq);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_dclk0_frequency = freq;
+
 	*table = (void *)gpu_metrics;
 
-	return sizeof(struct gpu_metrics_v1_1);
+	return sizeof(struct gpu_metrics_v1_3);
+out:
+	return ret;
 }
 
 static ssize_t navi12_get_legacy_gpu_metrics(struct smu_context *smu,
 					     void **table)
 {
 	struct smu_table_context *smu_table = &smu->smu_table;
-	struct gpu_metrics_v1_1 *gpu_metrics =
-		(struct gpu_metrics_v1_1 *)smu_table->gpu_metrics_table;
+	struct gpu_metrics_v1_3 *gpu_metrics =
+		(struct gpu_metrics_v1_3 *)smu_table->gpu_metrics_table;
 	SmuMetrics_NV12_legacy_t metrics;
 	int ret = 0;
+	int freq = 0, dpm = 0;
 
 	mutex_lock(&smu->metrics_lock);
 
@@ -2774,7 +2975,7 @@ static ssize_t navi12_get_legacy_gpu_metrics(struct smu_context *smu,
 
 	mutex_unlock(&smu->metrics_lock);
 
-	smu_cmn_init_soft_gpu_metrics(gpu_metrics, 1, 1);
+	smu_cmn_init_soft_gpu_metrics(gpu_metrics, 1, 3);
 
 	gpu_metrics->temperature_edge = metrics.TemperatureEdge;
 	gpu_metrics->temperature_hotspot = metrics.TemperatureHotspot;
@@ -2814,19 +3015,119 @@ static ssize_t navi12_get_legacy_gpu_metrics(struct smu_context *smu,
 
 	gpu_metrics->system_clock_counter = ktime_get_boottime_ns();
 
+	gpu_metrics->voltage_gfx = (155000 - 625 * metrics.CurrGfxVoltageOffset) / 100;
+	gpu_metrics->voltage_mem = (155000 - 625 * metrics.CurrMemVidOffset) / 100;
+	gpu_metrics->voltage_soc = (155000 - 625 * metrics.CurrSocVoltageOffset) / 100;
+
+	gpu_metrics->max_socket_power = smu->power_limit;
+
+	/* Frequency and DPM ranges */
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_GFXCLK, 0, &freq);
+	if (ret)
+		goto out;
+	gpu_metrics->min_gfxclk_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_SOCCLK, 0, &freq);
+	if (ret)
+		goto out;
+	gpu_metrics->min_socclk_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_UCLK, 0, &freq);
+	if (ret)
+		goto out;
+	gpu_metrics->min_uclk_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_VCLK, 0, &freq);
+	if (ret)
+		goto out;
+	gpu_metrics->min_vclk0_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_DCLK, 0, &freq);
+	if (ret)
+		goto out;
+	gpu_metrics->min_dclk0_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_level_count(smu, SMU_GFXCLK, &dpm);
+	if (ret)
+		goto out;
+	gpu_metrics->max_gfxclk_dpm = dpm;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_GFXCLK,
+			gpu_metrics->max_gfxclk_dpm - 1, &freq);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_gfxclk_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_level_count(smu, SMU_SOCCLK, &dpm);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_socclk_dpm = dpm;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_SOCCLK,
+			gpu_metrics->max_socclk_dpm - 1, &freq);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_socclk_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_level_count(smu, SMU_UCLK, &dpm);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_uclk_dpm = dpm;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_UCLK,
+			gpu_metrics->max_uclk_dpm - 1, &freq);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_uclk_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_level_count(smu, SMU_VCLK, &dpm);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_vclk0_dpm = dpm;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_VCLK,
+			gpu_metrics->max_vclk0_dpm - 1, &freq);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_vclk0_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_level_count(smu, SMU_DCLK, &dpm);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_dclk0_dpm = dpm;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_DCLK,
+			gpu_metrics->max_dclk0_dpm - 1, &freq);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_dclk0_frequency = freq;
+
 	*table = (void *)gpu_metrics;
 
-	return sizeof(struct gpu_metrics_v1_1);
+	return sizeof(struct gpu_metrics_v1_3);
+out:
+	return ret;
 }
 
 static ssize_t navi12_get_gpu_metrics(struct smu_context *smu,
 				      void **table)
 {
 	struct smu_table_context *smu_table = &smu->smu_table;
-	struct gpu_metrics_v1_1 *gpu_metrics =
-		(struct gpu_metrics_v1_1 *)smu_table->gpu_metrics_table;
+	struct gpu_metrics_v1_3 *gpu_metrics =
+		(struct gpu_metrics_v1_3 *)smu_table->gpu_metrics_table;
 	SmuMetrics_NV12_t metrics;
 	int ret = 0;
+	int freq = 0, dpm = 0;
 
 	mutex_lock(&smu->metrics_lock);
 
@@ -2842,7 +3143,7 @@ static ssize_t navi12_get_gpu_metrics(struct smu_context *smu,
 
 	mutex_unlock(&smu->metrics_lock);
 
-	smu_cmn_init_soft_gpu_metrics(gpu_metrics, 1, 1);
+	smu_cmn_init_soft_gpu_metrics(gpu_metrics, 1, 3);
 
 	gpu_metrics->temperature_edge = metrics.TemperatureEdge;
 	gpu_metrics->temperature_hotspot = metrics.TemperatureHotspot;
@@ -2884,9 +3185,108 @@ static ssize_t navi12_get_gpu_metrics(struct smu_context *smu,
 
 	gpu_metrics->system_clock_counter = ktime_get_boottime_ns();
 
+	gpu_metrics->voltage_gfx = (155000 - 625 * metrics.CurrGfxVoltageOffset) / 100;
+	gpu_metrics->voltage_mem = (155000 - 625 * metrics.CurrMemVidOffset) / 100;
+	gpu_metrics->voltage_soc = (155000 - 625 * metrics.CurrSocVoltageOffset) / 100;
+
+	gpu_metrics->max_socket_power = smu->power_limit;
+
+	/* Frequency and DPM ranges */
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_GFXCLK, 0, &freq);
+	if (ret)
+		goto out;
+	gpu_metrics->min_gfxclk_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_SOCCLK, 0, &freq);
+	if (ret)
+		goto out;
+	gpu_metrics->min_socclk_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_UCLK, 0, &freq);
+	if (ret)
+		goto out;
+	gpu_metrics->min_uclk_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_VCLK, 0, &freq);
+	if (ret)
+		goto out;
+	gpu_metrics->min_vclk0_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_DCLK, 0, &freq);
+	if (ret)
+		goto out;
+	gpu_metrics->min_dclk0_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_level_count(smu, SMU_GFXCLK, &dpm);
+	if (ret)
+		goto out;
+	gpu_metrics->max_gfxclk_dpm = dpm;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_GFXCLK,
+			gpu_metrics->max_gfxclk_dpm - 1, &freq);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_gfxclk_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_level_count(smu, SMU_SOCCLK, &dpm);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_socclk_dpm = dpm;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_SOCCLK,
+			gpu_metrics->max_socclk_dpm - 1, &freq);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_socclk_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_level_count(smu, SMU_UCLK, &dpm);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_uclk_dpm = dpm;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_UCLK,
+			gpu_metrics->max_uclk_dpm - 1, &freq);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_uclk_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_level_count(smu, SMU_VCLK, &dpm);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_vclk0_dpm = dpm;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_VCLK,
+			gpu_metrics->max_vclk0_dpm - 1, &freq);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_vclk0_frequency = freq;
+
+	ret = smu_v11_0_get_dpm_level_count(smu, SMU_DCLK, &dpm);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_dclk0_dpm = dpm;
+
+	ret = smu_v11_0_get_dpm_freq_by_index(smu, SMU_DCLK,
+			gpu_metrics->max_dclk0_dpm - 1, &freq);
+	if (ret)
+		goto out;
+
+	gpu_metrics->max_dclk0_frequency = freq;
+
 	*table = (void *)gpu_metrics;
 
-	return sizeof(struct gpu_metrics_v1_1);
+	return sizeof(struct gpu_metrics_v1_3);
+out:
+	return ret;
 }
 
 static ssize_t navi1x_get_gpu_metrics(struct smu_context *smu,
-- 
2.17.1

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