On Wed, Apr 28, 2021 at 11:22 PM Alex Deucher <alexdeucher@xxxxxxxxx> wrote:
>
> On Tue, Apr 20, 2021 at 5:25 PM Alex Deucher <alexdeucher@xxxxxxxxx> wrote:
> >
> > On Fri, Apr 16, 2021 at 12:29 PM Mario Kleiner
> > <mario.kleiner.de@xxxxxxxxx> wrote:
> > >
> > > Friendly ping to the AMD people. Nicholas, Harry, Alex, any feedback?
> > > Would be great to get this in sooner than later.
> > >
> >
> > No objections from me.
> >
>
> I don't have any objections to merging this. Are the IGT tests available?
>
> Alex
>.
IGT Patches are out now, already r-b by Ville, cc'd to you. As
mentioned in the cover letter for those, the new 16 bpc test cases on
top o f IGT master for kms_plane test now work nicely on my
RavenRidge, but i had to add hacks on top of kms_plane test to make it
work at all on RV, ie. get it to the point where it could execute the
tests for the new formats at all. Unmodified kms_plane from master
doesn't even work on RV with Linux 5.8. Seems IGT is quite a bit out
of date wrt. the kernel?
Things i had to do:
- Skip all tests for modifiers other than linear. --> Test
requirements wrt. tiling not met. Seems all the modifier support for
DCC, DCC_RETILE on Vega+ is missing from IGT so far?
- Skip test for format DRM_FORMAT_RGB565. CRC mismatch. Probably
because a 5 bpc container can't represent the net 8 bpc content from
the reference test image? Maybe all tests for < 8 bpc formats should
be skipped?
- Skip tests for yuv planar formats with BT2020 color space: Limited
range unsupported by DC, full range causes CRC mismatch.
- Problems with crc vblank count expected vs. actual for planar YUV formats.
- If the tests try to test more than the primary plane,
igt_pipe_crc_start() fails to open the crtc/crc/data file with -EIO.
See the attached patch with all the needed hacks. Not sure which of
these are limitations of the IGT test, and which are amdgpu bugs or hw
limitations, but applying this hack-patch on top of the patches for
the new formats makes kms_plane pass.
-mario
> > Alex
> >
> >
> > > Thanks and have a nice weekend,
> > > -mario
> > >
> > > On Fri, Mar 19, 2021 at 10:03 PM Mario Kleiner
> > > <mario.kleiner.de@xxxxxxxxx> wrote:
> > > >
> > > > Hi,
> > > >
> > > > this patch series adds the fourcc's for 16 bit fixed point unorm
> > > > framebuffers to the core, and then an implementation for AMD gpu's
> > > > with DisplayCore.
> > > >
> > > > This is intended to allow for pageflipping to, and direct scanout of,
> > > > Vulkan swapchain images in the format VK_FORMAT_R16G16B16A16_UNORM.
> > > > I have patched AMD's GPUOpen amdvlk OSS driver to enable this format
> > > > for swapchains, mapping to DRM_FORMAT_XBGR16161616:
> > > > Link: https://github.com/kleinerm/pal/commit/a25d4802074b13a8d5f7edc96ae45469ecbac3c4
> > > >
> > > > My main motivation for this is squeezing every bit of precision
> > > > out of the hardware for scientific and medical research applications,
> > > > where fp16 in the unorm range is limited to ~11 bpc effective linear
> > > > precision in the upper half [0.5;1.0] of the unorm range, although
> > > > the hardware could do at least 12 bpc.
> > > >
> > > > It has been successfully tested on AMD RavenRidge (DCN-1), and with
> > > > Polaris11 (DCE-11.2). Up to two displays were active on RavenRidge
> > > > (DP 2560x1440@144Hz + HDMI 2560x1440@120Hz), the maximum supported
> > > > on my hw, both running at 10 bpc DP output depth.
> > > >
> > > > Up to three displays were active on the Polaris (DP 2560x1440@144Hz +
> > > > 2560x1440@100Hz USB-C DP-altMode-to-HDMI converter + eDP 2880x1800@60Hz
> > > > Apple Retina panel), all running at 10 bpc output depth.
> > > >
> > > > No malfunctions, visual artifacts or other oddities were observed
> > > > (apart from an adventureous mess of cables and adapters on my desk),
> > > > suggesting it works.
> > > >
> > > > I used my automatic photometer measurement procedure to verify the
> > > > effective output precision of 10 bpc DP native signal + spatial
> > > > dithering in the gpu as enabled by the amdgpu driver. Results show
> > > > the expected 12 bpc precision i hoped for -- the current upper limit
> > > > for AMD display hw afaik.
> > > >
> > > > So it seems to work in the way i hoped :).
> > > >
> > > > Some open questions wrt. AMD DC, to be addressed in this patch series, or follow up
> > > > patches if neccessary:
> > > >
> > > > - For the atomic check for plane scaling, the current patch will
> > > > apply the same hw limits as for other rgb fixed point fb's, e.g.,
> > > > for 8 bpc rgb8. Is this correct? Or would we need to use the fp16
> > > > limits, because this is also a 64 bpp format? Or something new
> > > > entirely?
> > > >
> > > > - I haven't added the new fourcc to the DCC tables yet. Should i?
> > > >
> > > > - I had to change an assert for DCE to allow 36bpp linebuffers (patch 4/5).
> > > > It looks to me as if that assert was inconsistent with other places
> > > > in the driver where COLOR_DEPTH121212 is supported, and looking at
> > > > the code, the change seems harmless. At least on DCE-11.2 the change
> > > > didn't cause any noticeable (by myself) or measurable (by my equipment)
> > > > problems on any of the 3 connected displays.
> > > >
> > > > - Related to that change, while i needed to increase lb pixelsize to 36bpp
> > > > to get > 10 bpc effective precision on DCN, i didn't need to do that
> > > > on DCE. Also no change of lb pixelsize was needed on either DCN or DCe
> > > > to get > 10 bpc precision for fp16 framebuffers, so something seems to
> > > > behave differently for floating point 16 vs. fixed point 16. This all
> > > > seems to suggest one could leave lb pixelsize at the old 30 bpp value
> > > > on at least DCE-11.2 and still get the > 10 bpc precision if one wanted
> > > > to avoid the changes of patch 4/5.
> > > >
> > > > Thanks,
> > > > -mario
> > > >
> > > >
> > > _______________________________________________
> > > dri-devel mailing list
> > > dri-devel@xxxxxxxxxxxxxxxxxxxxx
> > > https://lists.freedesktop.org/mailman/listinfo/dri-devel
From 09f18c39bcafcd884cad47c7f33e892a57a2bf50 Mon Sep 17 00:00:00 2001
From: Mario Kleiner <mario.kleiner.de@xxxxxxxxx>
Date: Sat, 1 May 2021 16:06:12 +0200
Subject: [PATCH i-g-t] kms_plane: Hacks to make all AMD Raven format tests
pass.
These cause failure of atomic commit or other asserts and cause
the tests to abort:
- Problems with crc vblank count expected vs. actual for planar YUV.
- No support for YUV BT2020 limited range by amdgpu.
- Failure of igt_pipe_crc_start() for secondary planes.
- No support for DCC / DCC_RETILE modifiers introduced in Linux 5.11.
These do not cause abort of all tests iirc., just reporting the mismatch:
- CRC mismatch for YUV BT2020 full range.
- CRC mismatch on all YUV for src crop test.
- CRC mismatch for 16bpp RGB565 format.
- src crop test needs 16 pixel borders for 64bpp rgba16/fp16 formats.
---
tests/kms_plane.c | 31 +++++++++++++++++++++++++++++--
1 file changed, 29 insertions(+), 2 deletions(-)
diff --git a/tests/kms_plane.c b/tests/kms_plane.c
index 9fe253a8..6eb9a122 100644
--- a/tests/kms_plane.c
+++ b/tests/kms_plane.c
@@ -550,7 +550,7 @@ static void capture_crc(data_t *data, unsigned int vblank, igt_crc_t *crc)
igt_pipe_crc_get_for_frame(data->drm_fd, data->pipe_crc, vblank, crc);
igt_fail_on_f(!igt_skip_crc_compare &&
- crc->has_valid_frame && crc->frame != vblank,
+ crc->has_valid_frame && crc->frame != (vblank + (is_amdgpu_device(data->drm_fd) ? 2 : 0)),
"Got CRC for the wrong frame (got %u, expected %u). CRC buffer overflow?\n",
crc->frame, vblank);
}
@@ -787,6 +787,15 @@ static bool test_format_plane_yuv(data_t *data, enum pipe pipe,
igt_color_range_to_str(r)))
continue;
+ /* AMD can't do IGT_COLOR_YCBCR_BT2020 with limited range, only full range,
+ * otherwise atomic test fails with -EINVAL.
+ * With full range, we still get crc mismatch.
+ * Therefore skip IGT_COLOR_YCBCR_BT2020 encodings.
+ * Also skip tests for src cropping test -> crc mismatch.
+ */
+ if (is_amdgpu_device(data->drm_fd) && (e == IGT_COLOR_YCBCR_BT2020 || data->crop))
+ continue;
+
igt_info("Testing format " IGT_FORMAT_FMT " / modifier 0x%" PRIx64 " (%s, %s) on %s.%u\n",
IGT_FORMAT_ARGS(format), modifier,
igt_color_encoding_to_str(e),
@@ -921,6 +930,15 @@ static bool test_format_plane(data_t *data, enum pipe pipe,
f.modifier == ref.modifier)
continue;
+ /* Prevent use of yet unsupported DCC / DCC_RETILE modifiers on GFX9+ */
+ if (is_amdgpu_device(data->drm_fd) && (f.modifier != DRM_FORMAT_MOD_LINEAR))
+ continue;
+
+ /* Don't test formats which only hold less than 8 bpc of content */
+ // Or (igt_drm_format_to_bpp(f.format) == 16 && !igt_format_is_yuv(f.format)) for skip due to < 8 bpc?
+ if (f.format == DRM_FORMAT_RGB565)
+ continue;
+
/* test each format "class" only once in non-extended tests */
if (!data->extended && f.modifier != DRM_FORMAT_MOD_LINEAR) {
struct format_mod rf = {
@@ -981,6 +999,14 @@ static bool skip_plane(data_t *data, igt_plane_t *plane)
if (data->extended)
return false;
+ /* igt_pipe_crc_start() fails for futher planes, so only test primary plane.
+ * The error is a -EIO error when opening the ../crtc/crc/data file, which
+ * suggests that the DRM crtc_crc_open() function rejects open, because the
+ * associated crtc is (!crtc->state->active)?
+ */
+ if (is_amdgpu_device(data->drm_fd) && (plane->type != DRM_PLANE_TYPE_PRIMARY))
+ return true;
+
if (!is_i915_device(data->drm_fd))
return false;
@@ -1073,7 +1099,8 @@ run_tests_for_pipe_plane(data_t *data, enum pipe pipe)
igt_describe("verify the pixel formats for given plane and pipe with source clamping");
igt_subtest_f("pixel-format-pipe-%s-planes-source-clamping",
kmstest_pipe_name(pipe)) {
- data->crop = 4;
+ /* At least AMD needs crop to be multiple of 16 for 64bpp pixel formats */
+ data->crop = 4 * (is_amdgpu_device(data->drm_fd) ? 4 : 1);
test_pixel_formats(data, pipe);
}
--
2.25.1
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