On Fri, 2021-04-30 at 17:22 -0400, Nikola Cornij wrote: > [why] > Previously used value was not safe to provide the correct value, i.e. it > could be 0 if not not configured, leading to no MST on this platform. > > [how] > Do not use the value from BIOS, but from the structure populated at > encoder initialization time. > > Fixes: 98025a62cb00 ("drm/dp_mst: Use Extended Base Receiver Capability DPCD > space") > Signed-off-by: Nikola Cornij <nikola.cornij@xxxxxxx> > --- > drivers/gpu/drm/i915/display/intel_dp_mst.c | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c > b/drivers/gpu/drm/i915/display/intel_dp_mst.c > index bf7f8487945c..01a0ed99988f 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c > @@ -942,7 +942,6 @@ intel_dp_mst_encoder_init(struct intel_digital_port > *dig_port, int conn_base_id) > struct intel_dp *intel_dp = &dig_port->dp; > enum port port = dig_port->base.port; > int ret; > - int bios_max_link_rate; > > if (!HAS_DP_MST(i915) || intel_dp_is_edp(intel_dp)) > return 0; > @@ -957,11 +956,11 @@ intel_dp_mst_encoder_init(struct intel_digital_port > *dig_port, int conn_base_id) > > /* create encoders */ > intel_dp_create_fake_mst_encoders(dig_port); > - bios_max_link_rate = intel_bios_dp_max_link_rate(&dig_port->base); > ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, &i915->drm, > &intel_dp->aux, 16, 3, > (u8)dig_port->max_lanes, > - (u8)(bios_max_link_rate / 27000), > conn_base_id); > + (u8)(intel_dp- > >source_rates[intel_dp->num_source_rates - 1] / 27000), > + conn_base_id); This line is kind of long, I'd say we should just store the max link rate in a local variable like max_link_rate, then just pass that to drm_dp_mst_topology_mgr_init() Also, the commit message should probably be: drm/i915: Use the correct max source link rate for MST With those two things fixed: Reviewed-by: Lyude Paul <lyude@xxxxxxxxxx> > if (ret) > return ret; > -- Sincerely, Lyude Paul (she/her) Software Engineer at Red Hat Note: I deal with a lot of emails and have a lot of bugs on my plate. If you've asked me a question, are waiting for a review/merge on a patch, etc. and I haven't responded in a while, please feel free to send me another email to check on my status. I don't bite! _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx