[AMD Public Use]
Hi all,
This week this patchset was tested on a HP Envy 360, with Ryzen 5 4500U, on the following display types (via usb-c to dp/dvi/hdmi/vga):
4k 60z, 1440p 144hz, 1680*1050 60hz, internal eDP 1080p 60hz
Tested on a Sapphire Pulse RX5700XT on the following display types (via DP):
4k60 60hz, 1440p 144hz, 1680x1050 60hz.
Also tested on a Reference AMD RX6800 on the following display types (via DP):
4k60 60hz, 1440p 144hz.
Tested using a MST hub at 2x 4k 30hz on all systems.
Tested by Dan Wheeler <daniel.wheeler@xxxxxxx>
Thank you,
Dan Wheeler
Technologist | AMD
SW Display
O +(1) 905-882-2600 ext. 74665
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-----Original Message-----
From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Bindu Ramamurthy
Sent: April 9, 2021 10:04 PM
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Brol, Eryk <Eryk.Brol@xxxxxxx>; Li, Sun peng (Leo) <Sunpeng.Li@xxxxxxx>; Wentland, Harry <Harry.Wentland@xxxxxxx>; Zhuo, Qingqing <Qingqing.Zhuo@xxxxxxx>; Siqueira, Rodrigo <Rodrigo.Siqueira@xxxxxxx>; Jacob, Anson <Anson.Jacob@xxxxxxx>; Pillai, Aurabindo <Aurabindo.Pillai@xxxxxxx>; Lakha, Bhawanpreet <Bhawanpreet.Lakha@xxxxxxx>; R, Bindu <Bindu.R@xxxxxxx>
Subject: [PATCH 00/16] DC Patches April 12, 2021
This DC patchset brings improvements in multiple areas.
In summary, we highlight:
* Enhancement for multiple eDP BL control.
* Add debug flag to enable eDP ILR by default and debugfs to repress HPD/HPR_RX IRQ.
* Connect clock optimization,Set LTTPR mode to non-LTTPR, Fix DML validation of simple vs native.
* Fixes for DSC enable sequence,Force vsync flip,hang when psr is enabled etc.
* Firmware releases:
0.0.60
0.0.61
Anthony Koo (2):
drm/amd/display: [FW Promotion] Release 0.0.60
drm/amd/display: [FW Promotion] Release 0.0.61
Anthony Wang (1):
drm/amd/display: Force vsync flip when reconfiguring MPCC
Aric Cyr (1):
drm/amd/display: 3.2.131
Harry Wentland (1):
drm/amd/display: Add debugfs to repress HPD and HPR_RX IRQs
Jake Wang (1):
drm/amd/display: Added support for multiple eDP BL control
Lewis Huang (1):
drm/amd/display: wait vblank when stream enabled and update dpp clock
Michael Strauss (3):
drm/amd/display: Add debug flag to enable eDP ILR by default
drm/amd/display: Disable boot optimizations if ILR optimzation is
required
drm/amd/display: Remove static property from decide_edp_link_settings
Mike Hsieh (1):
drm/amd/display: Fix DSC enable sequence
Mikita Lipski (2):
drm/amd/display: Remove unused flag from stream state
drm/amd/display: Connect clock optimization function to dcn301
Nicholas Kazlauskas (1):
drm/amd/display: Fix DML validation of simple vs native 422 modes
Roman Li (1):
drm/amd/display: Fix hangs with psr enabled on dcn3.xx
Wesley Chalmers (1):
drm/amd/display: Set LTTPR mode to non-LTTPR if no repeaters found
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 9 +++- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 3 +- .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 35 +++++++++++++ .../amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c | 10 +++-
drivers/gpu/drm/amd/display/dc/core/dc.c | 22 +++++++++
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 15 +++--- .../gpu/drm/amd/display/dc/core/dc_link_dp.c | 49 ++++++++++++++++++-
.../drm/amd/display/dc/core/dc_link_hwss.c | 4 +-
drivers/gpu/drm/amd/display/dc/dc.h | 9 +++-
drivers/gpu/drm/amd/display/dc/dc_stream.h | 1 -
drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c | 2 +
.../display/dc/dce110/dce110_hw_sequencer.c | 6 ++-
.../drm/amd/display/dc/dcn20/dcn20_resource.c | 7 +--
.../drm/amd/display/dc/dcn21/dcn21_hwseq.c | 2 +
.../drm/amd/display/dc/dcn301/dcn301_init.c | 2 +
.../gpu/drm/amd/display/dc/inc/dc_link_dp.h | 8 +++
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 31 +++++++++++-
17 files changed, 191 insertions(+), 24 deletions(-)
--
2.25.1
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