[AMD Public Use] Hi all, This week this patchset was tested on a HP Envy 360, with Ryzen 5 4500U, on the following display types (via usb-c to dp/dvi/hdmi/vga): 4k 60z, 1440p 144hz, 1680*1050 60hz, internal eDP 1080p 60hz Tested on a Sapphire Pulse RX5700XT on the following display types (via DP): 4k60 60hz, 1440p 144hz, 1680x1050 60hz. Also tested on a Reference AMD RX6800 on the following display types (via DP): 4k60 60hz, 1440p 144hz. Tested using a MST hub at 2x 4k 30hz on all systems. Tested by Dan Wheeler <daniel.wheeler@xxxxxxx> Thank you, Dan Wheeler Technologist | AMD SW Display ------------------------------------------------------------------------------------------------------------------ 1 Commerce Valley Dr E, Thornhill, ON L3T 7X6 Facebook | Twitter | amd.com -----Original Message----- From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Anson Jacob Sent: March 26, 2021 6:05 PM To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx Cc: Brol, Eryk <Eryk.Brol@xxxxxxx>; Li, Sun peng (Leo) <Sunpeng.Li@xxxxxxx>; Wentland, Harry <Harry.Wentland@xxxxxxx>; Zhuo, Qingqing <Qingqing.Zhuo@xxxxxxx>; Siqueira, Rodrigo <Rodrigo.Siqueira@xxxxxxx>; Jacob, Anson <Anson.Jacob@xxxxxxx>; Pillai, Aurabindo <Aurabindo.Pillai@xxxxxxx>; Lakha, Bhawanpreet <Bhawanpreet.Lakha@xxxxxxx>; R, Bindu <Bindu.R@xxxxxxx> Subject: [PATCH 00/21] DC Patches March 26, 2021 This patchset brings along following features/fixes: - LTTPR improvements - Disable MALL when SMU not present - Fix bug in HW that causes P-State to hang when DPG is enabled in certain conditions - Update code path for enabling DPG - Update display endpoint control path - Add dynamic link encoder selection - Fix debugfs MST topology to dump from the root MST node - Enable DP DSC Compliance automation for Linux - ASSR is enabled only when DPCD is supported and the display connected is internal - Added kernel trace event to print real-time refresh rate value to debug VRR issues Anthony Koo (1): drm/amd/display: [FW Promotion] Release 0.0.58 Aric Cyr (1): drm/amd/display: 3.2.129 Chris Park (1): drm/amd/display: Disable MALL when SMU not present Eryk Brol (1): drm/amd/display: Fix MST topology debugfs Jimmy Kizito (2): drm/amd/display: Add dynamic link encoder selection. drm/amd/display: Update display endpoint control path. Krunoslav Kovac (1): drm/amd/display: Rename fs_params to hdr_tm_params Leo (Hanghong) Ma (1): drm/amd/display: Fix static checker warnings on tracebuff_fb Qingqing Zhuo (2): drm/amd/display: enable DP DSC Compliance automation drm/amd/display: add log for automated test Rodrigo Siqueira (1): drm/amd/display: Add refresh rate trace Stylon Wang (1): drm/amd/display: Guard ASSR with internal display flag Vladimir Stempen (1): drm/amd/display: Fix typo for variable name Wenjing Liu (2): drm/amd/display: define mod_hdcp_display_disable_option struct drm/amd/display: add mod hdcp interface for supporting encryption state query Wesley Chalmers (6): drm/amd/display: BIOS LTTPR Caps Interface drm/amd/display: Interface for LTTPR interop drm/amd/display: Enumerate LTTPR modes drm/amd/display: LTTPR config logic drm/amd/display: New path for enabling DPG drm/amd/display: Set max TTU on DPG enable .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 14 + .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 1 + .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 4 + .../amd/display/amdgpu_dm/amdgpu_dm_hdcp.c | 6 +- .../amd/display/amdgpu_dm/amdgpu_dm_trace.h | 19 ++ drivers/gpu/drm/amd/display/dc/Makefile | 5 +- .../drm/amd/display/dc/bios/bios_parser2.c | 190 +++++++++++ .../display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c | 7 + drivers/gpu/drm/amd/display/dc/core/dc.c | 35 ++ drivers/gpu/drm/amd/display/dc/core/dc_link.c | 16 +- .../gpu/drm/amd/display/dc/core/dc_link_dp.c | 197 +++++++++--- .../drm/amd/display/dc/core/dc_link_enc_cfg.c | 303 ++++++++++++++++++ .../drm/amd/display/dc/core/dc_link_hwss.c | 24 +- .../gpu/drm/amd/display/dc/core/dc_resource.c | 7 + drivers/gpu/drm/amd/display/dc/dc.h | 2 +- .../gpu/drm/amd/display/dc/dc_bios_types.h | 6 + drivers/gpu/drm/amd/display/dc/dc_link.h | 19 +- drivers/gpu/drm/amd/display/dc/dc_stream.h | 16 + drivers/gpu/drm/amd/display/dc/dc_types.h | 15 + .../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 10 +- .../gpu/drm/amd/display/dc/inc/core_types.h | 27 ++ .../gpu/drm/amd/display/dc/inc/hw/clk_mgr.h | 3 + drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h | 1 + .../drm/amd/display/dc/inc/hw/link_encoder.h | 13 + .../gpu/drm/amd/display/dc/inc/link_enc_cfg.h | 86 +++++ .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 4 +- .../gpu/drm/amd/display/dmub/src/dmub_srv.c | 142 ++++---- .../amd/display/modules/color/color_gamma.c | 6 +- .../amd/display/modules/color/color_gamma.h | 4 +- .../gpu/drm/amd/display/modules/hdcp/hdcp.c | 10 +- .../gpu/drm/amd/display/modules/hdcp/hdcp.h | 4 +- .../display/modules/hdcp/hdcp1_execution.c | 37 ++- .../display/modules/hdcp/hdcp1_transition.c | 6 +- .../display/modules/hdcp/hdcp2_execution.c | 10 +- .../display/modules/hdcp/hdcp2_transition.c | 10 +- .../drm/amd/display/modules/hdcp/hdcp_psp.c | 10 + .../drm/amd/display/modules/inc/mod_hdcp.h | 10 +- drivers/gpu/drm/amd/include/atomfirmware.h | 38 ++- 38 files changed, 1141 insertions(+), 176 deletions(-) create mode 100644 drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c create mode 100644 drivers/gpu/drm/amd/display/dc/inc/link_enc_cfg.h -- 2.25.1 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=04%7C01%7Cdaniel.wheeler%40amd.com%7Cd50542cfc59f441ba27908d8f0a34db1%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637523931470435149%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=2oJd%2FsM%2BayBUtDiQH3e0KtNUUe%2BAgw8wpQLXqU9PxVk%3D&reserved=0 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx