Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@xxxxxxx>
On 03/17, Qingqing Zhuo wrote:
> dmub_trace_int_entry() was introduced unintentionally, causing
> compiling issues.
>
> Fixes: 53e9c0f651421136 ("drm/amd/display: Support vertical interrupt 0 for all dcn ASIC")
> Signed-off-by: Qingqing Zhuo <qingqing.zhuo@xxxxxxx>
> Acked-by: Alex Deucher <alexander.deucher@xxxxxxx>
> ---
> .../gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c | 8 --------
> .../gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c | 8 --------
> 2 files changed, 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c b/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c
> index 48a3c360174e..3908ad929176 100644
> --- a/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c
> +++ b/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c
> @@ -278,13 +278,6 @@ static const struct irq_source_info_funcs vline0_irq_info_funcs = {
> .funcs = &vblank_irq_info_funcs\
> }
>
> -#define dmub_trace_int_entry()\
> - [DC_IRQ_SOURCE_DMCUB_OUTBOX0] = {\
> - IRQ_REG_ENTRY_DMUB(DMCUB_INTERRUPT_ENABLE, DMCUB_OUTBOX0_READY_INT_EN,\
> - DMCUB_INTERRUPT_ACK, DMCUB_OUTBOX0_READY_INT_ACK),\
> - .funcs = &dmub_trace_irq_info_funcs\
> - }
> -
> #define vline0_int_entry(reg_num)\
> [DC_IRQ_SOURCE_DC1_VLINE0 + reg_num] = {\
> IRQ_REG_ENTRY(OTG, reg_num,\
> @@ -411,7 +404,6 @@ irq_source_info_dcn21[DAL_IRQ_SOURCES_NUMBER] = {
> vline0_int_entry(3),
> vline0_int_entry(4),
> vline0_int_entry(5),
> - dmub_trace_int_entry(),
> };
>
> static const struct irq_service_funcs irq_service_funcs_dcn21 = {
> diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c b/drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c
> index 68f8f554c925..4ec6f6ad8c48 100644
> --- a/drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c
> +++ b/drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c
> @@ -276,13 +276,6 @@ static const struct irq_source_info_funcs vline0_irq_info_funcs = {
> .funcs = &vblank_irq_info_funcs\
> }
>
> -#define dmub_trace_int_entry()\
> - [DC_IRQ_SOURCE_DMCUB_OUTBOX0] = {\
> - IRQ_REG_ENTRY_DMUB(DMCUB_INTERRUPT_ENABLE, DMCUB_OUTBOX0_READY_INT_EN,\
> - DMCUB_INTERRUPT_ACK, DMCUB_OUTBOX0_READY_INT_ACK),\
> - .funcs = &dmub_trace_irq_info_funcs\
> - }
> -
> #define vline0_int_entry(reg_num)\
> [DC_IRQ_SOURCE_DC1_VLINE0 + reg_num] = {\
> IRQ_REG_ENTRY(OTG, reg_num,\
> @@ -405,7 +398,6 @@ irq_source_info_dcn30[DAL_IRQ_SOURCES_NUMBER] = {
> vline0_int_entry(3),
> vline0_int_entry(4),
> vline0_int_entry(5),
> - dmub_trace_int_entry(),
> };
>
> static const struct irq_service_funcs irq_service_funcs_dcn30 = {
> --
> 2.17.1
>
--
Rodrigo Siqueira
https://siqueira.tech
Attachment:
signature.asc
Description: PGP signature
_______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx
