On Wed, Mar 10, 2021 at 12:55 PM shaoyunl <shaoyun.liu@xxxxxxx> wrote:
>
> This new MSG provide the interface for driver to enable/disable the Light Secondary Bus Reset
> support from SMU. When enabled, SMU will only do minimum NBIO response to the SBR request and
> leave the real HW reset to be handled by driver later. When disabled (default state),SMU will
> pass the request to PSP for a HW reset
>
> Signed-off-by: shaoyunl <shaoyun.liu@xxxxxxx>
> Change-Id: I5f0e48730d2b4b48fed8137aa57c683d5b3d1b9f
> ---
> drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h | 7 +++++++
> drivers/gpu/drm/amd/pm/inc/arcturus_ppsmc.h | 7 +++++++
> drivers/gpu/drm/amd/pm/inc/smu_types.h | 1 +
> drivers/gpu/drm/amd/pm/inc/smu_v11_0.h | 2 ++
> drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 12 ++++++++++++
> drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c | 2 ++
> drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 10 ++++++++++
> 7 files changed, 41 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
> index 00186a3b29be..369f0267b1f2 100644
> --- a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
> +++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
> @@ -1149,6 +1149,11 @@ struct pptable_funcs {
> * parameters to defaults.
> */
> int (*set_fine_grain_gfx_freq_parameters)(struct smu_context *smu);
> +
> + /**
> + * @set_lightSBR: Set lightSBR mode for the SMU.
> + */
> + int (*set_lightSBR)(struct smu_context *smu, bool enable);
Please don't use CamelCase. Call this set_light_sbr. Same comments below.
Alex
> };
>
> typedef enum {
> @@ -1350,5 +1355,7 @@ ssize_t smu_sys_get_gpu_metrics(void *handle, void **table);
> int smu_enable_mgpu_fan_boost(void *handle);
> int smu_gfx_state_change_set(struct smu_context *smu, uint32_t state);
>
> +int smu_set_lightSBR(struct smu_context *smu, bool enable);
> +
> #endif
> #endif
> diff --git a/drivers/gpu/drm/amd/pm/inc/arcturus_ppsmc.h b/drivers/gpu/drm/amd/pm/inc/arcturus_ppsmc.h
> index 79afb132164e..45f5d29bc705 100644
> --- a/drivers/gpu/drm/amd/pm/inc/arcturus_ppsmc.h
> +++ b/drivers/gpu/drm/amd/pm/inc/arcturus_ppsmc.h
> @@ -120,6 +120,13 @@
> #define PPSMC_MSG_ReadSerialNumTop32 0x40
> #define PPSMC_MSG_ReadSerialNumBottom32 0x41
>
> +/* paramater for MSG_LightSBR
> + * 1 -- Enable light secondary bus reset, only do nbio respond without further handling,
> + * leave driver to handle the real reset
> + * 0 -- Disable LightSBR, default behavior, SMU will pass the reset to PSP
> + */
> +#define PPSMC_MSG_LightSBR 0x42
> +
> typedef uint32_t PPSMC_Result;
> typedef uint32_t PPSMC_Msg;
> #pragma pack(pop)
> diff --git a/drivers/gpu/drm/amd/pm/inc/smu_types.h b/drivers/gpu/drm/amd/pm/inc/smu_types.h
> index aa4822202587..92f72d770a99 100644
> --- a/drivers/gpu/drm/amd/pm/inc/smu_types.h
> +++ b/drivers/gpu/drm/amd/pm/inc/smu_types.h
> @@ -214,6 +214,7 @@
> __SMU_DUMMY_MAP(SetSlowPPTLimit), \
> __SMU_DUMMY_MAP(GetFastPPTLimit), \
> __SMU_DUMMY_MAP(GetSlowPPTLimit), \
> + __SMU_DUMMY_MAP(LightSBR), \
>
> #undef __SMU_DUMMY_MAP
> #define __SMU_DUMMY_MAP(type) SMU_MSG_##type
> diff --git a/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h b/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h
> index bf570a7af6a7..7c7b149e7a83 100644
> --- a/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h
> +++ b/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h
> @@ -295,5 +295,7 @@ int smu_v11_0_deep_sleep_control(struct smu_context *smu,
>
> void smu_v11_0_interrupt_work(struct smu_context *smu);
>
> +int smu_v11_0_set_lightSBR(struct smu_context *smu, bool enable);
> +
> #endif
> #endif
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> index 502e1b926a06..58f508c36084 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> @@ -2934,6 +2934,18 @@ int smu_gfx_state_change_set(struct smu_context *smu, uint32_t state)
> return ret;
> }
>
> +int smu_set_lightSBR(struct smu_context *smu, bool enable)
> +{
> + int ret = 0;
> +
> + mutex_lock(&smu->mutex);
> + ret = smu->ppt_funcs->set_lightSBR(smu, enable);
> + mutex_unlock(&smu->mutex);
> +
> + return ret;
> +}
> +
> +
> static const struct amd_pm_funcs swsmu_pm_funcs = {
> /* export for sysfs */
> .set_fan_control_mode = smu_pp_set_fan_control_mode,
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> index f76d1b8aeecc..73a30208aa71 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> @@ -142,6 +142,7 @@ static const struct cmn2asic_msg_mapping arcturus_message_map[SMU_MSG_MAX_COUNT]
> MSG_MAP(GmiPwrDnControl, PPSMC_MSG_GmiPwrDnControl, 0),
> MSG_MAP(ReadSerialNumTop32, PPSMC_MSG_ReadSerialNumTop32, 1),
> MSG_MAP(ReadSerialNumBottom32, PPSMC_MSG_ReadSerialNumBottom32, 1),
> + MSG_MAP(LightSBR, PPSMC_MSG_LightSBR, 0),
> };
>
> static const struct cmn2asic_mapping arcturus_clk_map[SMU_CLK_COUNT] = {
> @@ -2363,6 +2364,7 @@ static const struct pptable_funcs arcturus_ppt_funcs = {
> .deep_sleep_control = smu_v11_0_deep_sleep_control,
> .get_fan_parameters = arcturus_get_fan_parameters,
> .interrupt_work = smu_v11_0_interrupt_work,
> + .set_lightSBR = smu_v11_0_set_lightSBR,
> };
>
> void arcturus_set_ppt_funcs(struct smu_context *smu)
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
> index 1882a0643f7a..29aef6eeb55b 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
> @@ -1601,6 +1601,16 @@ int smu_v11_0_mode1_reset(struct smu_context *smu)
> return ret;
> }
>
> +int smu_v11_0_set_lightSBR(struct smu_context *smu, bool enable)
> +{
> + int ret = 0;
> +
> + ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_LightSBR, enable ? 1 : 0, NULL);
> +
> + return ret;
> +}
> +
> +
> int smu_v11_0_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type clk_type,
> uint32_t *min, uint32_t *max)
> {
> --
> 2.17.1
>
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