[AMD Official Use Only - Internal Distribution Only]
Apologies for the noise, and please ignore this one.
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-----Original Message-----
From: Leo (Hanghong) Ma <hanghong.ma@xxxxxxx>
Sent: Thursday, March 4, 2021 2:31 PM
To: Siqueira, Rodrigo <Rodrigo.Siqueira@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Wentland, Harry <Harry.Wentland@xxxxxxx>; Ma, Hanghong <Hanghong.Ma@xxxxxxx>
Subject: [PATCH] Revert "drm/amdgpu: add DMUB trace event IRQ source define"
This reverts commit 3590cb311815b3f82af04e2ff1f182ca919af3d3.
The patch is applyed mistakenly before code review.
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 -
drivers/gpu/drm/amd/include/ivsrcid/dcn/irqsrcs_dcn_1_0.h | 2 --
2 files changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index f01b75ec6c60..1624c2bc8285 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -912,7 +912,6 @@ struct amdgpu_device {
struct amdgpu_irq_srcvupdate_irq;
struct amdgpu_irq_srcpageflip_irq;
struct amdgpu_irq_srchpd_irq;
-struct amdgpu_irq_srcdmub_trace_irq;
/* rings */
u64fence_context;
diff --git a/drivers/gpu/drm/amd/include/ivsrcid/dcn/irqsrcs_dcn_1_0.h b/drivers/gpu/drm/amd/include/ivsrcid/dcn/irqsrcs_dcn_1_0.h
index e2bffcae273a..ac9fa3a9bd07 100644
--- a/drivers/gpu/drm/amd/include/ivsrcid/dcn/irqsrcs_dcn_1_0.h
+++ b/drivers/gpu/drm/amd/include/ivsrcid/dcn/irqsrcs_dcn_1_0.h
@@ -1130,7 +1130,5 @@
#define DCN_1_0__SRCID__HUBP6_FLIP_AWAY_INTERRUPT0x63// Flip_away interrupt is generated when all data for old surface is returned and old surface is not used again after the surface flip.HUBP6_IHC_FLIP_AWAY_INTERRUPTDISP_INTERRUPT_STATUS_CONTINUE17Level / Pulse
#define DCN_1_0__SRCID__HUBP7_FLIP_AWAY_INTERRUPT0x64// Flip_away interrupt is generated when all data for old surface is returned and old surface is not used again after the surface flip.HUBP7_IHC_FLIP_AWAY_INTERRUPTDISP_INTERRUPT_STATUS_CONTINUE17Level / Pulse
-#define DCN_1_0__SRCID__DMCUB_OUTBOX_HIGH_PRIORITY_READY_INT 0x68
-#define DCN_1_0__CTXID__DMCUB_OUTBOX_HIGH_PRIORITY_READY_INT 6
#endif // __IRQSRCS_DCN_1_0_H__
--
2.17.1
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