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[AMD Public Use]
yes, thanks lijo.
Best Regards,
Kevin
From: Lazar, Lijo <Lijo.Lazar@xxxxxxx>
Sent: Tuesday, March 2, 2021 4:09 PM To: Wang, Kevin(Yang) <Kevin1.Wang@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx <amd-gfx@xxxxxxxxxxxxxxxxxxxxx> Cc: Zhang, Hawking <Hawking.Zhang@xxxxxxx> Subject: RE: [PATCH] drm/amdgpu: fix parameter error of RREG32_PCIE() in amdgpu_regs_pcie [AMD Public Use]
Same can be done for pcie_write also. Reviewed-by: Lijo Lazar <lijo.lazar@xxxxxxx> -----Original Message----- From: Wang, Kevin(Yang) <Kevin1.Wang@xxxxxxx> Sent: Tuesday, March 2, 2021 1:34 PM To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx Cc: Zhang, Hawking <Hawking.Zhang@xxxxxxx>; Lazar, Lijo <Lijo.Lazar@xxxxxxx>; Wang, Kevin(Yang) <Kevin1.Wang@xxxxxxx> Subject: [PATCH] drm/amdgpu: fix parameter error of RREG32_PCIE() in amdgpu_regs_pcie the register offset isn't needed division by 4 to pass RREG32_PCIE() Signed-off-by: Kevin Wang <kevin1.wang@xxxxxxx> --- drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c index a09469f84251..f3434a6f120f 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c @@ -317,7 +317,7 @@ static ssize_t amdgpu_debugfs_regs_pcie_read(struct file *f, char __user *buf, while (size) { uint32_t value; - value = RREG32_PCIE(*pos >> 2); + value = RREG32_PCIE(*pos); r = put_user(value, (uint32_t *)buf); if (r) { pm_runtime_mark_last_busy(adev_to_drm(adev)->dev); -- 2.17.1 |
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