From: Vladimir Stempen <vladimir.stempen@xxxxxxx>
[why]
Synchronization displays with different timings feature uses
reminder of 64 bit division (modulus operator) , which is not
supported by 32 bit platforms
[how]
Use div64 API for 64 bit modulus
Signed-off-by: Vladimir Stempen <vladimir.stempen@xxxxxxx>
Tested-by: Bindu Ramamurthy<bindu.r@xxxxxxx>
---
.../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 15 ++++++++++-----
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 45f4dbd886b9..190b10445e03 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -1893,16 +1893,21 @@ uint64_t reduceSizeAndFraction(
num = *numerator;
denom = *denominator;
for (i = 0; i < count; i++) {
+ uint32_t num_reminder, denom_reminder;
+ uint64_t num_result, denom_result;
if (checkUint32Bounary &&
num <= max_int32 && denom <= max_int32) {
ret = true;
break;
}
- while (num % prime_numbers[i] == 0 &&
- denom % prime_numbers[i] == 0) {
- num = div_u64(num, prime_numbers[i]);
- denom = div_u64(denom, prime_numbers[i]);
- }
+ do {
+ num_result = div_u64_rem(num, prime_numbers[i], &num_reminder);
+ denom_result = div_u64_rem(denom, prime_numbers[i], &denom_reminder);
+ if (num_reminder == 0 && denom_reminder == 0) {
+ num = num_result;
+ denom = denom_result;
+ }
+ } while (num_reminder == 0 && denom_reminder == 0);
}
*numerator = num;
*denominator = denom;
--
2.25.1
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