From: Oak Zeng <Oak.Zeng@xxxxxxx> For the new 2-level GART table, the last PDE0 points to PTB. Since PTB is in vram and right now we are runing under s=0 mode (vram is treated as FB carveout), so the s bit of this PDE0 should be set to 0. Signed-off-by: Oak Zeng <Oak.Zeng@xxxxxxx> Reviewed-by: Felix Kuehling <Felix.Kuehling@xxxxxxx> Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx> --- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c index 2be31ad8e31c..6d9c660da27a 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c @@ -650,7 +650,7 @@ void amdgpu_gmc_init_pdb0(struct amdgpu_device *adev) * PTB who has more than 512 entries each * pointing to a 4K system page */ - flags = AMDGPU_PTE_VALID | AMDGPU_PTE_SYSTEM; + flags = AMDGPU_PTE_VALID; flags |= AMDGPU_PDE_BFS(0) | AMDGPU_PTE_SNOOPED; /* Requires gart_ptb_gpu_pa to be 4K aligned */ amdgpu_gmc_set_pte_pde(adev, adev->gmc.ptr_pdb0, i, gart_ptb_gpu_pa, flags); -- 2.29.2 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx
