[PATCH 116/159] drm/amdgpu: apply new pmfw loading sequence to arcturus and onwards

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From: Hawking Zhang <Hawking.Zhang@xxxxxxx>

Arcturus and onwards products should follow the same sequence
that have pmfw loading ahead of tmr setup

Signed-off-by: Hawking Zhang <Hawking.Zhang@xxxxxxx>
Reviewed-by: Kevin Wang <kevin1.wang@xxxxxxx>
Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 38d400289013..cf8cfe620d8c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -57,7 +57,7 @@ static int psp_load_smu_fw(struct psp_context *psp);
  *   - Load XGMI/RAS/HDCP/DTM TA if any
  *
  * This new sequence is required for
- *   - Arcturus
+ *   - Arcturus and onwards
  *   - Navi12 and onwards
  */
 static void psp_check_pmfw_centralized_cstate_management(struct psp_context *psp)
@@ -72,8 +72,7 @@ static void psp_check_pmfw_centralized_cstate_management(struct psp_context *psp
 	if (adev->flags & AMD_IS_APU)
 		return;
 
-	if ((adev->asic_type == CHIP_ARCTURUS)	||
-	    (adev->asic_type == CHIP_ALDEBARAN)	||
+	if ((adev->asic_type >= CHIP_ARCTURUS) ||
 	    (adev->asic_type >= CHIP_NAVI12))
 		psp->pmfw_centralized_cstate_management = true;
 }
-- 
2.29.2

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