From: Oak Zeng <Oak.Zeng@xxxxxxx> If TTM placement flag is cached, buffer is intended to be mapped as cached from CPU. Map it with ioremap_cache. This wasn't necessary before as device memory was never mapped as cached from CPU side. It becomes necessary for aldebaran as device memory is mapped cached from CPU. Signed-off-by: Oak Zeng <Oak.Zeng@xxxxxxx> Reviewed-by: Christian Koenig <Christian.Koenig@xxxxxxx> Tested-by: Amber Lin <Amber.Lin@xxxxxxx> Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx> --- drivers/gpu/drm/ttm/ttm_bo_util.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c b/drivers/gpu/drm/ttm/ttm_bo_util.c index ee04716b2603..e11ec1ff5d0b 100644 --- a/drivers/gpu/drm/ttm/ttm_bo_util.c +++ b/drivers/gpu/drm/ttm/ttm_bo_util.c @@ -519,6 +519,10 @@ static int ttm_bo_ioremap(struct ttm_buffer_object *bo, map->virtual = ioremap_wc(bo->mem.bus.base + bo->mem.bus.offset + offset, size); + else if (mem->placement & TTM_PL_FLAG_CACHED) + map->virtual = ioremap_cache(bo->mem.bus.base + + bo->mem.bus.offset + offset, + size); else map->virtual = ioremap(bo->mem.bus.base + bo->mem.bus.offset + offset, -- 2.29.2 _______________________________________________ amd-gfx mailing list amd-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/amd-gfx
